mirror of
https://github.com/rd-stuffs/msm-4.14.git
synced 2025-02-20 11:45:48 +08:00
This is the 4.14.99 stable release
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Merge 4.14.99 into android-4.14
Changes in 4.14.99
drm/bufs: Fix Spectre v1 vulnerability
staging: iio: adc: ad7280a: handle error from __ad7280_read32()
drm/vgem: Fix vgem_init to get drm device available.
pinctrl: bcm2835: Use raw spinlock for RT compatibility
ASoC: Intel: mrfld: fix uninitialized variable access
gpu: ipu-v3: image-convert: Prevent race between run and unprepare
ath9k: dynack: use authentication messages for 'late' ack
scsi: lpfc: Correct LCB RJT handling
scsi: mpt3sas: Call sas_remove_host before removing the target devices
scsi: lpfc: Fix LOGO/PLOGI handling when triggerd by ABTS Timeout event
ARM: 8808/1: kexec:offline panic_smp_self_stop CPU
clk: boston: fix possible memory leak in clk_boston_setup()
dlm: Don't swamp the CPU with callbacks queued during recovery
x86/PCI: Fix Broadcom CNB20LE unintended sign extension (redux)
powerpc/pseries: add of_node_put() in dlpar_detach_node()
crypto: aes_ti - disable interrupts while accessing S-box
drm/vc4: ->x_scaling[1] should never be set to VC4_SCALING_NONE
serial: fsl_lpuart: clear parity enable bit when disable parity
ptp: check gettime64 return code in PTP_SYS_OFFSET ioctl
MIPS: Boston: Disable EG20T prefetch
staging:iio:ad2s90: Make probe handle spi_setup failure
fpga: altera-cvp: Fix registration for CvP incapable devices
Tools: hv: kvp: Fix a warning of buffer overflow with gcc 8.0.1
platform/chrome: don't report EC_MKBP_EVENT_SENSOR_FIFO as wakeup
staging: iio: ad7780: update voltage on read
usbnet: smsc95xx: fix rx packet alignment
drm/rockchip: fix for mailbox read size
ARM: OMAP2+: hwmod: Fix some section annotations
net/mlx5: EQ, Use the right place to store/read IRQ affinity hint
modpost: validate symbol names also in find_elf_symbol
perf tools: Add Hygon Dhyana support
soc/tegra: Don't leak device tree node reference
media: mtk-vcodec: Release device nodes in mtk_vcodec_init_enc_pm()
ptp: Fix pass zero to ERR_PTR() in ptp_clock_register
dmaengine: xilinx_dma: Remove __aligned attribute on zynqmp_dma_desc_ll
iio: adc: meson-saradc: check for devm_kasprintf failure
iio: adc: meson-saradc: fix internal clock names
iio: accel: kxcjk1013: Add KIOX010A ACPI Hardware-ID
media: adv*/tc358743/ths8200: fill in min width/height/pixelclock
ACPI: SPCR: Consider baud rate 0 as preconfigured state
staging: pi433: fix potential null dereference
f2fs: move dir data flush to write checkpoint process
f2fs: fix race between write_checkpoint and write_begin
f2fs: fix wrong return value of f2fs_acl_create
i2c: sh_mobile: add support for r8a77990 (R-Car E3)
arm64: io: Ensure calls to delay routines are ordered against prior readX()
sunvdc: Do not spin in an infinite loop when vio_ldc_send() returns EAGAIN
soc: bcm: brcmstb: Don't leak device tree node reference
nfsd4: fix crash on writing v4_end_grace before nfsd startup
drm: Clear state->acquire_ctx before leaving drm_atomic_helper_commit_duplicated_state()
arm64: io: Ensure value passed to __iormb() is held in a 64-bit register
Thermal: do not clear passive state during system sleep
firmware/efi: Add NULL pointer checks in efivars API functions
s390/zcrypt: improve special ap message cmd handling
arm64: ftrace: don't adjust the LR value
ARM: dts: mmp2: fix TWSI2
x86/fpu: Add might_fault() to user_insn()
media: DaVinci-VPBE: fix error handling in vpbe_initialize()
smack: fix access permissions for keyring
usb: dwc3: Correct the logic for checking TRB full in __dwc3_prepare_one_trb()
usb: hub: delay hub autosuspend if USB3 port is still link training
timekeeping: Use proper seqcount initializer
usb: mtu3: fix the issue about SetFeature(U1/U2_Enable)
clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks
driver core: Move async_synchronize_full call
kobject: return error code if writing /sys/.../uevent fails
IB/hfi1: Unreserve a reserved request when it is completed
usb: dwc3: trace: add missing break statement to make compiler happy
pinctrl: sx150x: handle failure case of devm_kstrdup
iommu/amd: Fix amd_iommu=force_isolation
ARM: dts: Fix OMAP4430 SDP Ethernet startup
mips: bpf: fix encoding bug for mm_srlv32_op
media: coda: fix H.264 deblocking filter controls
ARM: dts: Fix up the D-Link DIR-685 MTD partition info
watchdog: renesas_wdt: don't set divider while watchdog is running
usb: dwc3: gadget: Disable CSP for stream OUT ep
iommu/arm-smmu: Add support for qcom,smmu-v2 variant
iommu/arm-smmu-v3: Use explicit mb() when moving cons pointer
sata_rcar: fix deferred probing
clk: imx6sl: ensure MMDC CH0 handshake is bypassed
cpuidle: big.LITTLE: fix refcount leak
OPP: Use opp_table->regulators to verify no regulator case
i2c-axxia: check for error conditions first
phy: sun4i-usb: add support for missing USB PHY index
udf: Fix BUG on corrupted inode
switchtec: Fix SWITCHTEC_IOCTL_EVENT_IDX_ALL flags overwrite
selftests/bpf: use __bpf_constant_htons in test_prog.c
ARM: pxa: avoid section mismatch warning
ASoC: fsl: Fix SND_SOC_EUKREA_TLV320 build error on i.MX8M
KVM: PPC: Book3S: Only report KVM_CAP_SPAPR_TCE_VFIO on powernv machines
mmc: bcm2835: Recover from MMC_SEND_EXT_CSD
mmc: bcm2835: reset host on timeout
memstick: Prevent memstick host from getting runtime suspended during card detection
mmc: sdhci-of-esdhc: Fix timeout checks
mmc: sdhci-xenon: Fix timeout checks
tty: serial: samsung: Properly set flags in autoCTS mode
perf test: Fix perf_event_attr test failure
perf header: Fix unchecked usage of strncpy()
perf probe: Fix unchecked usage of strncpy()
arm64: KVM: Skip MMIO insn after emulation
usb: musb: dsps: fix otg state machine
percpu: convert spin_lock_irq to spin_lock_irqsave.
powerpc/uaccess: fix warning/error with access_ok()
mac80211: fix radiotap vendor presence bitmap handling
xfrm6_tunnel: Fix spi check in __xfrm6_tunnel_alloc_spi
Bluetooth: Fix unnecessary error message for HCI request completion
mlxsw: spectrum: Properly cleanup LAG uppers when removing port from LAG
scsi: smartpqi: correct host serial num for ssa
scsi: smartpqi: correct volume status
scsi: smartpqi: increase fw status register read timeout
cw1200: Fix concurrency use-after-free bugs in cw1200_hw_scan()
powerpc/perf: Fix thresholding counter data for unknown type
drbd: narrow rcu_read_lock in drbd_sync_handshake
drbd: disconnect, if the wrong UUIDs are attached on a connected peer
drbd: skip spurious timeout (ping-timeo) when failing promote
drbd: Avoid Clang warning about pointless switch statment
video: clps711x-fb: release disp device node in probe()
md: fix raid10 hang issue caused by barrier
fbdev: fbmem: behave better with small rotated displays and many CPUs
i40e: define proper net_device::neigh_priv_len
igb: Fix an issue that PME is not enabled during runtime suspend
ACPI/APEI: Clear GHES block_status before panic()
fbdev: fbcon: Fix unregister crash when more than one framebuffer
powerpc/mm: Fix reporting of kernel execute faults on the 8xx
pinctrl: meson: meson8: fix the GPIO function for the GPIOAO pins
pinctrl: meson: meson8b: fix the GPIO function for the GPIOAO pins
KVM: x86: svm: report MSR_IA32_MCG_EXT_CTL as unsupported
powerpc/fadump: Do not allow hot-remove memory from fadump reserved area.
kvm: Change offset in kvm_write_guest_offset_cached to unsigned
NFS: nfs_compare_mount_options always compare auth flavors.
hwmon: (lm80) fix a missing check of the status of SMBus read
hwmon: (lm80) fix a missing check of bus read in lm80 probe
seq_buf: Make seq_buf_puts() null-terminate the buffer
crypto: ux500 - Use proper enum in cryp_set_dma_transfer
crypto: ux500 - Use proper enum in hash_set_dma_transfer
MIPS: ralink: Select CONFIG_CPU_MIPSR2_IRQ_VI on MT7620/8
cifs: check ntwrk_buf_start for NULL before dereferencing it
um: Avoid marking pages with "changed protection"
niu: fix missing checks of niu_pci_eeprom_read
f2fs: fix sbi->extent_list corruption issue
cgroup: fix parsing empty mount option string
scripts/decode_stacktrace: only strip base path when a prefix of the path
ocfs2: don't clear bh uptodate for block read
ocfs2: improve ocfs2 Makefile
isdn: hisax: hfc_pci: Fix a possible concurrency use-after-free bug in HFCPCI_l1hw()
gdrom: fix a memory leak bug
fsl/fman: Use GFP_ATOMIC in {memac,tgec}_add_hash_mac_address()
block/swim3: Fix -EBUSY error when re-opening device after unmount
thermal: bcm2835: enable hwmon explicitly
kdb: Don't back trace on a cpu that didn't round up
thermal: generic-adc: Fix adc to temp interpolation
HID: lenovo: Add checks to fix of_led_classdev_register
kernel/hung_task.c: break RCU locks based on jiffies
proc/sysctl: fix return error for proc_doulongvec_minmax()
kernel/hung_task.c: force console verbose before panic
fs/epoll: drop ovflist branch prediction
exec: load_script: don't blindly truncate shebang string
scripts/gdb: fix lx-version string output
thermal: hwmon: inline helpers when CONFIG_THERMAL_HWMON is not set
dccp: fool proof ccid_hc_[rt]x_parse_options()
enic: fix checksum validation for IPv6
net: dp83640: expire old TX-skb
rxrpc: bad unlock balance in rxrpc_recvmsg
skge: potential memory corruption in skge_get_regs()
rds: fix refcount bug in rds_sock_addref
net: systemport: Fix WoL with password after deep sleep
net/mlx5e: Force CHECKSUM_UNNECESSARY for short ethernet frames
net: dsa: slave: Don't propagate flag changes on down slave interfaces
ALSA: compress: Fix stop handling on compressed capture streams
ALSA: hda - Serialize codec registrations
fuse: call pipe_buf_release() under pipe lock
fuse: decrement NR_WRITEBACK_TEMP on the right page
fuse: handle zero sized retrieve correctly
dmaengine: bcm2835: Fix interrupt race on RT
dmaengine: bcm2835: Fix abort of transactions
dmaengine: imx-dma: fix wrong callback invoke
futex: Handle early deadlock return correctly
irqchip/gic-v3-its: Plug allocation race for devices sharing a DevID
usb: phy: am335x: fix race condition in _probe
usb: dwc3: gadget: Handle 0 xfer length for OUT EP
usb: gadget: udc: net2272: Fix bitwise and boolean operations
usb: gadget: musb: fix short isoc packets with inventra dma
staging: speakup: fix tty-operation NULL derefs
scsi: cxlflash: Prevent deadlock when adapter probe fails
scsi: aic94xx: fix module loading
KVM: x86: work around leak of uninitialized stack contents (CVE-2019-7222)
kvm: fix kvm_ioctl_create_device() reference counting (CVE-2019-6974)
KVM: nVMX: unconditionally cancel preemption timer in free_nested (CVE-2019-7221)
cpu/hotplug: Fix "SMT disabled by BIOS" detection for KVM
perf/x86/intel/uncore: Add Node ID mask
x86/MCE: Initialize mce.bank in the case of a fatal error in mce_no_way_out()
perf/core: Don't WARN() for impossible ring-buffer sizes
perf tests evsel-tp-sched: Fix bitwise operator
serial: fix race between flush_to_ldisc and tty_open
serial: 8250_pci: Make PCI class test non fatal
nfsd4: fix cached replies to solo SEQUENCE compounds
nfsd4: catch some false session retries
IB/hfi1: Add limit test for RC/UC send via loopback
perf/x86/intel: Delay memory deallocation until x86_pmu_dead_cpu()
ath9k: dynack: make ewma estimation faster
ath9k: dynack: check da->enabled first in sampling routines
Linux 4.14.99
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
commit
0951849351
2
Makefile
2
Makefile
@ -1,7 +1,7 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
VERSION = 4
|
||||
PATCHLEVEL = 14
|
||||
SUBLEVEL = 98
|
||||
SUBLEVEL = 99
|
||||
EXTRAVERSION =
|
||||
NAME = Petit Gorille
|
||||
|
||||
|
||||
@ -128,20 +128,16 @@
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||||
read-only;
|
||||
};
|
||||
/*
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||||
* Between the boot loader and the rootfs is the kernel
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* in a custom Storlink format flashed from the boot
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* menu. The rootfs is in squashfs format.
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* This firmware image contains the kernel catenated
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* with the squashfs root filesystem. For some reason
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* this is called "upgrade" on the vendor system.
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*/
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partition@1800c0 {
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label = "rootfs";
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reg = <0x001800c0 0x01dbff40>;
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read-only;
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};
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partition@1f40000 {
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partition@40000 {
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label = "upgrade";
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reg = <0x01f40000 0x00040000>;
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reg = <0x00040000 0x01f40000>;
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read-only;
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};
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||||
/* RGDB, Residental Gateway Database? */
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partition@1f80000 {
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label = "rgdb";
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reg = <0x01f80000 0x00040000>;
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||||
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||||
@ -220,12 +220,15 @@
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||||
status = "disabled";
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||||
};
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||||
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twsi2: i2c@d4025000 {
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twsi2: i2c@d4031000 {
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compatible = "mrvl,mmp-twsi";
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reg = <0xd4025000 0x1000>;
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interrupts = <58>;
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reg = <0xd4031000 0x1000>;
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interrupt-parent = <&intcmux17>;
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interrupts = <0>;
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||||
clocks = <&soc_clocks MMP2_CLK_TWSI1>;
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||||
resets = <&soc_clocks MMP2_CLK_TWSI1>;
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#address-cells = <1>;
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||||
#size-cells = <0>;
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||||
status = "disabled";
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||||
};
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||||
|
||||
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@ -33,6 +33,7 @@
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gpio = <&gpio2 16 GPIO_ACTIVE_HIGH>; /* gpio line 48 */
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enable-active-high;
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regulator-boot-on;
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startup-delay-us = <25000>;
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};
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vbat: fixedregulator-vbat {
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@ -691,6 +691,21 @@ void smp_send_stop(void)
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pr_warn("SMP: failed to stop secondary CPUs\n");
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}
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/* In case panic() and panic() called at the same time on CPU1 and CPU2,
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* and CPU 1 calls panic_smp_self_stop() before crash_smp_send_stop()
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* CPU1 can't receive the ipi irqs from CPU2, CPU1 will be always online,
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* kdump fails. So split out the panic_smp_self_stop() and add
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* set_cpu_online(smp_processor_id(), false).
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*/
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void panic_smp_self_stop(void)
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{
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pr_debug("CPU %u will stop doing anything useful since another CPU has paniced\n",
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smp_processor_id());
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set_cpu_online(smp_processor_id(), false);
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while (1)
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cpu_relax();
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}
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|
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/*
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* not supported here
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*/
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|
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@ -2497,7 +2497,7 @@ static int __init _init(struct omap_hwmod *oh, void *data)
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* a stub; implementing this properly requires iclk autoidle usecounting in
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* the clock code. No return value.
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*/
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static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
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static void _setup_iclk_autoidle(struct omap_hwmod *oh)
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{
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struct omap_hwmod_ocp_if *os;
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@ -2528,7 +2528,7 @@ static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
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* reset. Returns 0 upon success or a negative error code upon
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* failure.
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*/
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static int __init _setup_reset(struct omap_hwmod *oh)
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static int _setup_reset(struct omap_hwmod *oh)
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{
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int r;
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|
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@ -2589,7 +2589,7 @@ static int __init _setup_reset(struct omap_hwmod *oh)
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*
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* No return value.
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*/
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static void __init _setup_postsetup(struct omap_hwmod *oh)
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static void _setup_postsetup(struct omap_hwmod *oh)
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{
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u8 postsetup_state;
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|
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|
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@ -547,7 +547,7 @@ static struct pxa3xx_u2d_platform_data cm_x300_u2d_platform_data = {
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.exit = cm_x300_u2d_exit,
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};
|
||||
|
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static void cm_x300_init_u2d(void)
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static void __init cm_x300_init_u2d(void)
|
||||
{
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pxa3xx_set_u2d_info(&cm_x300_u2d_platform_data);
|
||||
}
|
||||
|
||||
@ -183,7 +183,7 @@ static struct pxafb_mach_info littleton_lcd_info = {
|
||||
.lcd_conn = LCD_COLOR_TFT_16BPP,
|
||||
};
|
||||
|
||||
static void littleton_init_lcd(void)
|
||||
static void __init littleton_init_lcd(void)
|
||||
{
|
||||
pxa_set_fb_info(NULL, &littleton_lcd_info);
|
||||
}
|
||||
|
||||
@ -558,7 +558,7 @@ static struct pxaohci_platform_data zeus_ohci_platform_data = {
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||||
.flags = ENABLE_PORT_ALL | POWER_SENSE_LOW,
|
||||
};
|
||||
|
||||
static void zeus_register_ohci(void)
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||||
static void __init zeus_register_ohci(void)
|
||||
{
|
||||
/* Port 2 is shared between host and client interface. */
|
||||
UP2OCR = UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;
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||||
|
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@ -106,7 +106,23 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)
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||||
}
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||||
|
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/* IO barriers */
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#define __iormb() rmb()
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||||
#define __iormb(v) \
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({ \
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unsigned long tmp; \
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\
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rmb(); \
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||||
\
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||||
/* \
|
||||
* Create a dummy control dependency from the IO read to any \
|
||||
* later instructions. This ensures that a subsequent call to \
|
||||
* udelay() will be ordered due to the ISB in get_cycles(). \
|
||||
*/ \
|
||||
asm volatile("eor %0, %1, %1\n" \
|
||||
"cbnz %0, ." \
|
||||
: "=r" (tmp) : "r" ((unsigned long)(v)) \
|
||||
: "memory"); \
|
||||
})
|
||||
|
||||
#define __iowmb() wmb()
|
||||
|
||||
#define mmiowb() do { } while (0)
|
||||
@ -131,10 +147,10 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)
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||||
* following Normal memory access. Writes are ordered relative to any prior
|
||||
* Normal memory access.
|
||||
*/
|
||||
#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
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||||
#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
|
||||
#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
|
||||
#define readq(c) ({ u64 __v = readq_relaxed(c); __iormb(); __v; })
|
||||
#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(__v); __v; })
|
||||
#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(__v); __v; })
|
||||
#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(__v); __v; })
|
||||
#define readq(c) ({ u64 __v = readq_relaxed(c); __iormb(__v); __v; })
|
||||
|
||||
#define writeb(v,c) ({ __iowmb(); writeb_relaxed((v),(c)); })
|
||||
#define writew(v,c) ({ __iowmb(); writew_relaxed((v),(c)); })
|
||||
@ -185,9 +201,9 @@ extern void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size);
|
||||
/*
|
||||
* io{read,write}{16,32,64}be() macros
|
||||
*/
|
||||
#define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
|
||||
#define ioread32be(p) ({ __u32 __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; })
|
||||
#define ioread64be(p) ({ __u64 __v = be64_to_cpu((__force __be64)__raw_readq(p)); __iormb(); __v; })
|
||||
#define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(__v); __v; })
|
||||
#define ioread32be(p) ({ __u32 __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(__v); __v; })
|
||||
#define ioread64be(p) ({ __u64 __v = be64_to_cpu((__force __be64)__raw_readq(p)); __iormb(__v); __v; })
|
||||
|
||||
#define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_be16(v), p); })
|
||||
#define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); })
|
||||
|
||||
@ -79,7 +79,6 @@
|
||||
.macro mcount_get_lr reg
|
||||
ldr \reg, [x29]
|
||||
ldr \reg, [\reg, #8]
|
||||
mcount_adjust_addr \reg, \reg
|
||||
.endm
|
||||
|
||||
.macro mcount_get_lr_addr reg
|
||||
|
||||
@ -141,6 +141,12 @@
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
eg20t_phub@2,0,0 {
|
||||
compatible = "pci8086,8801";
|
||||
reg = <0x00020000 0 0 0 0>;
|
||||
intel,eg20t-prefetch = <0>;
|
||||
};
|
||||
|
||||
eg20t_mac@2,0,1 {
|
||||
compatible = "pci8086,8802";
|
||||
reg = <0x00020100 0 0 0 0>;
|
||||
|
||||
@ -369,8 +369,8 @@ enum mm_32a_minor_op {
|
||||
mm_ext_op = 0x02c,
|
||||
mm_pool32axf_op = 0x03c,
|
||||
mm_srl32_op = 0x040,
|
||||
mm_srlv32_op = 0x050,
|
||||
mm_sra_op = 0x080,
|
||||
mm_srlv32_op = 0x090,
|
||||
mm_rotr_op = 0x0c0,
|
||||
mm_lwxs_op = 0x118,
|
||||
mm_addu32_op = 0x150,
|
||||
|
||||
@ -39,6 +39,7 @@ choice
|
||||
|
||||
config SOC_MT7620
|
||||
bool "MT7620/8"
|
||||
select CPU_MIPSR2_IRQ_VI
|
||||
select HW_HAS_PCI
|
||||
|
||||
config SOC_MT7621
|
||||
|
||||
@ -200,7 +200,7 @@ struct fad_crash_memory_ranges {
|
||||
unsigned long long size;
|
||||
};
|
||||
|
||||
extern int is_fadump_boot_memory_area(u64 addr, ulong size);
|
||||
extern int is_fadump_memory_area(u64 addr, ulong size);
|
||||
extern int early_init_dt_scan_fw_dump(unsigned long node,
|
||||
const char *uname, int depth, void *data);
|
||||
extern int fadump_reserve_mem(void);
|
||||
|
||||
@ -54,7 +54,7 @@
|
||||
#endif
|
||||
|
||||
#define access_ok(type, addr, size) \
|
||||
(__chk_user_ptr(addr), \
|
||||
(__chk_user_ptr(addr), (void)(type), \
|
||||
__access_ok((__force unsigned long)(addr), (size), get_fs()))
|
||||
|
||||
/*
|
||||
|
||||
@ -117,13 +117,19 @@ int __init early_init_dt_scan_fw_dump(unsigned long node,
|
||||
|
||||
/*
|
||||
* If fadump is registered, check if the memory provided
|
||||
* falls within boot memory area.
|
||||
* falls within boot memory area and reserved memory area.
|
||||
*/
|
||||
int is_fadump_boot_memory_area(u64 addr, ulong size)
|
||||
int is_fadump_memory_area(u64 addr, ulong size)
|
||||
{
|
||||
u64 d_start = fw_dump.reserve_dump_area_start;
|
||||
u64 d_end = d_start + fw_dump.reserve_dump_area_size;
|
||||
|
||||
if (!fw_dump.dump_registered)
|
||||
return 0;
|
||||
|
||||
if (((addr + size) > d_start) && (addr <= d_end))
|
||||
return 1;
|
||||
|
||||
return (addr + size) > RMA_START && addr <= fw_dump.boot_memory_size;
|
||||
}
|
||||
|
||||
|
||||
@ -540,8 +540,11 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
|
||||
#ifdef CONFIG_PPC_BOOK3S_64
|
||||
case KVM_CAP_SPAPR_TCE:
|
||||
case KVM_CAP_SPAPR_TCE_64:
|
||||
/* fallthrough */
|
||||
r = 1;
|
||||
break;
|
||||
case KVM_CAP_SPAPR_TCE_VFIO:
|
||||
r = !!cpu_has_feature(CPU_FTR_HVMODE);
|
||||
break;
|
||||
case KVM_CAP_PPC_RTAS:
|
||||
case KVM_CAP_PPC_FIXUP_HCALL:
|
||||
case KVM_CAP_PPC_ENABLE_HCALL:
|
||||
|
||||
@ -215,7 +215,9 @@ static int mm_fault_error(struct pt_regs *regs, unsigned long addr, int fault)
|
||||
static bool bad_kernel_fault(bool is_exec, unsigned long error_code,
|
||||
unsigned long address)
|
||||
{
|
||||
if (is_exec && (error_code & (DSISR_NOEXEC_OR_G | DSISR_KEYFAULT))) {
|
||||
/* NX faults set DSISR_PROTFAULT on the 8xx, DSISR_NOEXEC_OR_G on others */
|
||||
if (is_exec && (error_code & (DSISR_NOEXEC_OR_G | DSISR_KEYFAULT |
|
||||
DSISR_PROTFAULT))) {
|
||||
printk_ratelimited(KERN_CRIT "kernel tried to execute"
|
||||
" exec-protected page (%lx) -"
|
||||
"exploit attempt? (uid: %d)\n",
|
||||
|
||||
@ -228,8 +228,13 @@ void isa207_get_mem_weight(u64 *weight)
|
||||
u64 mmcra = mfspr(SPRN_MMCRA);
|
||||
u64 exp = MMCRA_THR_CTR_EXP(mmcra);
|
||||
u64 mantissa = MMCRA_THR_CTR_MANT(mmcra);
|
||||
u64 sier = mfspr(SPRN_SIER);
|
||||
u64 val = (sier & ISA207_SIER_TYPE_MASK) >> ISA207_SIER_TYPE_SHIFT;
|
||||
|
||||
*weight = mantissa << (2 * exp);
|
||||
if (val == 0 || val == 7)
|
||||
*weight = 0;
|
||||
else
|
||||
*weight = mantissa << (2 * exp);
|
||||
}
|
||||
|
||||
int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp)
|
||||
|
||||
@ -284,6 +284,8 @@ int dlpar_detach_node(struct device_node *dn)
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
of_node_put(dn);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@ -441,8 +441,11 @@ static bool lmb_is_removable(struct of_drconf_cell *lmb)
|
||||
phys_addr = lmb->base_addr;
|
||||
|
||||
#ifdef CONFIG_FA_DUMP
|
||||
/* Don't hot-remove memory that falls in fadump boot memory area */
|
||||
if (is_fadump_boot_memory_area(phys_addr, block_sz))
|
||||
/*
|
||||
* Don't hot-remove memory that falls in fadump boot memory area
|
||||
* and memory that is reserved for capturing old kernel memory.
|
||||
*/
|
||||
if (is_fadump_memory_area(phys_addr, block_sz))
|
||||
return false;
|
||||
#endif
|
||||
|
||||
|
||||
@ -161,8 +161,8 @@ struct ica_xcRB {
|
||||
* @cprb_len: CPRB header length [0x0020]
|
||||
* @cprb_ver_id: CPRB version id. [0x04]
|
||||
* @pad_000: Alignment pad bytes
|
||||
* @flags: Admin cmd [0x80] or functional cmd [0x00]
|
||||
* @func_id: Function id / subtype [0x5434]
|
||||
* @flags: Admin bit [0x80], Special bit [0x20]
|
||||
* @func_id: Function id / subtype [0x5434] "T4"
|
||||
* @source_id: Source id [originator id]
|
||||
* @target_id: Target id [usage/ctrl domain id]
|
||||
* @ret_code: Return code
|
||||
|
||||
@ -197,12 +197,17 @@ static inline pte_t pte_mkold(pte_t pte)
|
||||
|
||||
static inline pte_t pte_wrprotect(pte_t pte)
|
||||
{
|
||||
pte_clear_bits(pte, _PAGE_RW);
|
||||
if (likely(pte_get_bits(pte, _PAGE_RW)))
|
||||
pte_clear_bits(pte, _PAGE_RW);
|
||||
else
|
||||
return pte;
|
||||
return(pte_mknewprot(pte));
|
||||
}
|
||||
|
||||
static inline pte_t pte_mkread(pte_t pte)
|
||||
{
|
||||
if (unlikely(pte_get_bits(pte, _PAGE_USER)))
|
||||
return pte;
|
||||
pte_set_bits(pte, _PAGE_USER);
|
||||
return(pte_mknewprot(pte));
|
||||
}
|
||||
@ -221,6 +226,8 @@ static inline pte_t pte_mkyoung(pte_t pte)
|
||||
|
||||
static inline pte_t pte_mkwrite(pte_t pte)
|
||||
{
|
||||
if (unlikely(pte_get_bits(pte, _PAGE_RW)))
|
||||
return pte;
|
||||
pte_set_bits(pte, _PAGE_RW);
|
||||
return(pte_mknewprot(pte));
|
||||
}
|
||||
|
||||
@ -3419,6 +3419,11 @@ static void free_excl_cntrs(int cpu)
|
||||
}
|
||||
|
||||
static void intel_pmu_cpu_dying(int cpu)
|
||||
{
|
||||
fini_debug_store_on_cpu(cpu);
|
||||
}
|
||||
|
||||
static void intel_pmu_cpu_dead(int cpu)
|
||||
{
|
||||
struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
|
||||
struct intel_shared_regs *pc;
|
||||
@ -3431,8 +3436,6 @@ static void intel_pmu_cpu_dying(int cpu)
|
||||
}
|
||||
|
||||
free_excl_cntrs(cpu);
|
||||
|
||||
fini_debug_store_on_cpu(cpu);
|
||||
}
|
||||
|
||||
static void intel_pmu_sched_task(struct perf_event_context *ctx,
|
||||
@ -3521,6 +3524,7 @@ static __initconst const struct x86_pmu core_pmu = {
|
||||
.cpu_prepare = intel_pmu_cpu_prepare,
|
||||
.cpu_starting = intel_pmu_cpu_starting,
|
||||
.cpu_dying = intel_pmu_cpu_dying,
|
||||
.cpu_dead = intel_pmu_cpu_dead,
|
||||
};
|
||||
|
||||
static struct attribute *intel_pmu_attrs[];
|
||||
@ -3560,6 +3564,8 @@ static __initconst const struct x86_pmu intel_pmu = {
|
||||
.cpu_prepare = intel_pmu_cpu_prepare,
|
||||
.cpu_starting = intel_pmu_cpu_starting,
|
||||
.cpu_dying = intel_pmu_cpu_dying,
|
||||
.cpu_dead = intel_pmu_cpu_dead,
|
||||
|
||||
.guest_get_msrs = intel_guest_get_msrs,
|
||||
.sched_task = intel_pmu_sched_task,
|
||||
};
|
||||
|
||||
@ -1221,6 +1221,8 @@ static struct pci_driver snbep_uncore_pci_driver = {
|
||||
.id_table = snbep_uncore_pci_ids,
|
||||
};
|
||||
|
||||
#define NODE_ID_MASK 0x7
|
||||
|
||||
/*
|
||||
* build pci bus to socket mapping
|
||||
*/
|
||||
@ -1242,7 +1244,7 @@ static int snbep_pci2phy_map_init(int devid, int nodeid_loc, int idmap_loc, bool
|
||||
err = pci_read_config_dword(ubox_dev, nodeid_loc, &config);
|
||||
if (err)
|
||||
break;
|
||||
nodeid = config;
|
||||
nodeid = config & NODE_ID_MASK;
|
||||
/* get the Node ID mapping */
|
||||
err = pci_read_config_dword(ubox_dev, idmap_loc, &config);
|
||||
if (err)
|
||||
|
||||
@ -106,6 +106,9 @@ extern void fpstate_sanitize_xstate(struct fpu *fpu);
|
||||
#define user_insn(insn, output, input...) \
|
||||
({ \
|
||||
int err; \
|
||||
\
|
||||
might_fault(); \
|
||||
\
|
||||
asm volatile(ASM_STAC "\n" \
|
||||
"1:" #insn "\n\t" \
|
||||
"2: " ASM_CLAC "\n" \
|
||||
|
||||
@ -68,7 +68,7 @@ void __init check_bugs(void)
|
||||
* identify_boot_cpu() initialized SMT support information, let the
|
||||
* core code know.
|
||||
*/
|
||||
cpu_smt_check_topology_early();
|
||||
cpu_smt_check_topology();
|
||||
|
||||
if (!IS_ENABLED(CONFIG_SMP)) {
|
||||
pr_info("CPU: ");
|
||||
|
||||
@ -773,6 +773,7 @@ static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp,
|
||||
quirk_no_way_out(i, m, regs);
|
||||
|
||||
if (mce_severity(m, mca_cfg.tolerant, &tmp, true) >= MCE_PANIC_SEVERITY) {
|
||||
m->bank = i;
|
||||
mce_read_aux(m, i);
|
||||
*msg = tmp;
|
||||
return 1;
|
||||
|
||||
@ -5319,6 +5319,13 @@ static bool svm_cpu_has_accelerated_tpr(void)
|
||||
|
||||
static bool svm_has_emulated_msr(int index)
|
||||
{
|
||||
switch (index) {
|
||||
case MSR_IA32_MCG_EXT_CTL:
|
||||
return false;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
@ -27,6 +27,7 @@
|
||||
#include <linux/mm.h>
|
||||
#include <linux/highmem.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/sched/smt.h>
|
||||
#include <linux/moduleparam.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <linux/trace_events.h>
|
||||
@ -7708,6 +7709,7 @@ static void free_nested(struct vcpu_vmx *vmx)
|
||||
if (!vmx->nested.vmxon)
|
||||
return;
|
||||
|
||||
hrtimer_cancel(&vmx->nested.preemption_timer);
|
||||
vmx->nested.vmxon = false;
|
||||
free_vpid(vmx->nested.vpid02);
|
||||
vmx->nested.posted_intr_nv = -1;
|
||||
@ -10119,7 +10121,7 @@ static int vmx_vm_init(struct kvm *kvm)
|
||||
* Warn upon starting the first VM in a potentially
|
||||
* insecure environment.
|
||||
*/
|
||||
if (cpu_smt_control == CPU_SMT_ENABLED)
|
||||
if (sched_smt_active())
|
||||
pr_warn_once(L1TF_MSG_SMT);
|
||||
if (l1tf_vmx_mitigation == VMENTER_L1D_FLUSH_NEVER)
|
||||
pr_warn_once(L1TF_MSG_L1D);
|
||||
|
||||
@ -4611,6 +4611,13 @@ int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
|
||||
{
|
||||
u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
|
||||
|
||||
/*
|
||||
* FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
|
||||
* is returned, but our callers are not ready for that and they blindly
|
||||
* call kvm_inject_page_fault. Ensure that they at least do not leak
|
||||
* uninitialized kernel stack memory into cr2 and error code.
|
||||
*/
|
||||
memset(exception, 0, sizeof(*exception));
|
||||
return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
|
||||
exception);
|
||||
}
|
||||
|
||||
@ -50,8 +50,8 @@ static void __init cnb20le_res(u8 bus, u8 slot, u8 func)
|
||||
word1 = read_pci_config_16(bus, slot, func, 0xc0);
|
||||
word2 = read_pci_config_16(bus, slot, func, 0xc2);
|
||||
if (word1 != word2) {
|
||||
res.start = (word1 << 16) | 0x0000;
|
||||
res.end = (word2 << 16) | 0xffff;
|
||||
res.start = ((resource_size_t) word1 << 16) | 0x0000;
|
||||
res.end = ((resource_size_t) word2 << 16) | 0xffff;
|
||||
res.flags = IORESOURCE_MEM;
|
||||
update_res(info, res.start, res.end, res.flags, 0);
|
||||
}
|
||||
|
||||
@ -958,7 +958,8 @@ config CRYPTO_AES_TI
|
||||
8 for decryption), this implementation only uses just two S-boxes of
|
||||
256 bytes each, and attempts to eliminate data dependent latencies by
|
||||
prefetching the entire table into the cache at the start of each
|
||||
block.
|
||||
block. Interrupts are also disabled to avoid races where cachelines
|
||||
are evicted when the CPU is interrupted to do something else.
|
||||
|
||||
config CRYPTO_AES_586
|
||||
tristate "AES cipher algorithms (i586)"
|
||||
|
||||
@ -269,6 +269,7 @@ static void aesti_encrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
|
||||
const u32 *rkp = ctx->key_enc + 4;
|
||||
int rounds = 6 + ctx->key_length / 4;
|
||||
u32 st0[4], st1[4];
|
||||
unsigned long flags;
|
||||
int round;
|
||||
|
||||
st0[0] = ctx->key_enc[0] ^ get_unaligned_le32(in);
|
||||
@ -276,6 +277,12 @@ static void aesti_encrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
|
||||
st0[2] = ctx->key_enc[2] ^ get_unaligned_le32(in + 8);
|
||||
st0[3] = ctx->key_enc[3] ^ get_unaligned_le32(in + 12);
|
||||
|
||||
/*
|
||||
* Temporarily disable interrupts to avoid races where cachelines are
|
||||
* evicted when the CPU is interrupted to do something else.
|
||||
*/
|
||||
local_irq_save(flags);
|
||||
|
||||
st0[0] ^= __aesti_sbox[ 0] ^ __aesti_sbox[128];
|
||||
st0[1] ^= __aesti_sbox[32] ^ __aesti_sbox[160];
|
||||
st0[2] ^= __aesti_sbox[64] ^ __aesti_sbox[192];
|
||||
@ -300,6 +307,8 @@ static void aesti_encrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
|
||||
put_unaligned_le32(subshift(st1, 1) ^ rkp[5], out + 4);
|
||||
put_unaligned_le32(subshift(st1, 2) ^ rkp[6], out + 8);
|
||||
put_unaligned_le32(subshift(st1, 3) ^ rkp[7], out + 12);
|
||||
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
static void aesti_decrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
|
||||
@ -308,6 +317,7 @@ static void aesti_decrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
|
||||
const u32 *rkp = ctx->key_dec + 4;
|
||||
int rounds = 6 + ctx->key_length / 4;
|
||||
u32 st0[4], st1[4];
|
||||
unsigned long flags;
|
||||
int round;
|
||||
|
||||
st0[0] = ctx->key_dec[0] ^ get_unaligned_le32(in);
|
||||
@ -315,6 +325,12 @@ static void aesti_decrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
|
||||
st0[2] = ctx->key_dec[2] ^ get_unaligned_le32(in + 8);
|
||||
st0[3] = ctx->key_dec[3] ^ get_unaligned_le32(in + 12);
|
||||
|
||||
/*
|
||||
* Temporarily disable interrupts to avoid races where cachelines are
|
||||
* evicted when the CPU is interrupted to do something else.
|
||||
*/
|
||||
local_irq_save(flags);
|
||||
|
||||
st0[0] ^= __aesti_inv_sbox[ 0] ^ __aesti_inv_sbox[128];
|
||||
st0[1] ^= __aesti_inv_sbox[32] ^ __aesti_inv_sbox[160];
|
||||
st0[2] ^= __aesti_inv_sbox[64] ^ __aesti_inv_sbox[192];
|
||||
@ -339,6 +355,8 @@ static void aesti_decrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
|
||||
put_unaligned_le32(inv_subshift(st1, 1) ^ rkp[5], out + 4);
|
||||
put_unaligned_le32(inv_subshift(st1, 2) ^ rkp[6], out + 8);
|
||||
put_unaligned_le32(inv_subshift(st1, 3) ^ rkp[7], out + 12);
|
||||
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
static struct crypto_alg aes_alg = {
|
||||
|
||||
@ -675,6 +675,8 @@ static void __ghes_panic(struct ghes *ghes)
|
||||
{
|
||||
__ghes_print_estatus(KERN_EMERG, ghes->generic, ghes->estatus);
|
||||
|
||||
ghes_clear_estatus(ghes);
|
||||
|
||||
/* reboot to log the error! */
|
||||
if (!panic_timeout)
|
||||
panic_timeout = ghes_panic_timeout;
|
||||
|
||||
@ -148,6 +148,13 @@ int __init parse_spcr(bool earlycon)
|
||||
}
|
||||
|
||||
switch (table->baud_rate) {
|
||||
case 0:
|
||||
/*
|
||||
* SPCR 1.04 defines 0 as a preconfigured state of UART.
|
||||
* Assume firmware or bootloader configures console correctly.
|
||||
*/
|
||||
baud_rate = 0;
|
||||
break;
|
||||
case 3:
|
||||
baud_rate = 9600;
|
||||
break;
|
||||
@ -196,6 +203,10 @@ int __init parse_spcr(bool earlycon)
|
||||
* UART so don't attempt to change to the baud rate state
|
||||
* in the table because driver cannot calculate the dividers
|
||||
*/
|
||||
baud_rate = 0;
|
||||
}
|
||||
|
||||
if (!baud_rate) {
|
||||
snprintf(opts, sizeof(opts), "%s,%s,0x%llx", uart, iotype,
|
||||
table->serial_port.address);
|
||||
} else {
|
||||
|
||||
@ -880,7 +880,9 @@ static int sata_rcar_probe(struct platform_device *pdev)
|
||||
int ret = 0;
|
||||
|
||||
irq = platform_get_irq(pdev, 0);
|
||||
if (irq <= 0)
|
||||
if (irq < 0)
|
||||
return irq;
|
||||
if (!irq)
|
||||
return -EINVAL;
|
||||
|
||||
priv = devm_kzalloc(&pdev->dev, sizeof(struct sata_rcar_priv),
|
||||
|
||||
@ -616,8 +616,10 @@ static void remove_probe_files(struct bus_type *bus)
|
||||
static ssize_t uevent_store(struct device_driver *drv, const char *buf,
|
||||
size_t count)
|
||||
{
|
||||
kobject_synth_uevent(&drv->p->kobj, buf, count);
|
||||
return count;
|
||||
int rc;
|
||||
|
||||
rc = kobject_synth_uevent(&drv->p->kobj, buf, count);
|
||||
return rc ? rc : count;
|
||||
}
|
||||
static DRIVER_ATTR_WO(uevent);
|
||||
|
||||
@ -833,8 +835,10 @@ static void klist_devices_put(struct klist_node *n)
|
||||
static ssize_t bus_uevent_store(struct bus_type *bus,
|
||||
const char *buf, size_t count)
|
||||
{
|
||||
kobject_synth_uevent(&bus->p->subsys.kobj, buf, count);
|
||||
return count;
|
||||
int rc;
|
||||
|
||||
rc = kobject_synth_uevent(&bus->p->subsys.kobj, buf, count);
|
||||
return rc ? rc : count;
|
||||
}
|
||||
static BUS_ATTR(uevent, S_IWUSR, NULL, bus_uevent_store);
|
||||
|
||||
|
||||
@ -991,8 +991,14 @@ out:
|
||||
static ssize_t uevent_store(struct device *dev, struct device_attribute *attr,
|
||||
const char *buf, size_t count)
|
||||
{
|
||||
if (kobject_synth_uevent(&dev->kobj, buf, count))
|
||||
int rc;
|
||||
|
||||
rc = kobject_synth_uevent(&dev->kobj, buf, count);
|
||||
|
||||
if (rc) {
|
||||
dev_err(dev, "uevent: failed to send synthetic uevent\n");
|
||||
return rc;
|
||||
}
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
@ -813,9 +813,6 @@ static void __device_release_driver(struct device *dev, struct device *parent)
|
||||
|
||||
drv = dev->driver;
|
||||
if (drv) {
|
||||
if (driver_allows_async_probing(drv))
|
||||
async_synchronize_full();
|
||||
|
||||
while (device_links_busy(dev)) {
|
||||
device_unlock(dev);
|
||||
if (parent)
|
||||
@ -920,6 +917,9 @@ void driver_detach(struct device_driver *drv)
|
||||
struct device_private *dev_prv;
|
||||
struct device *dev;
|
||||
|
||||
if (driver_allows_async_probing(drv))
|
||||
async_synchronize_full();
|
||||
|
||||
for (;;) {
|
||||
spin_lock(&drv->p->klist_devices.k_lock);
|
||||
if (list_empty(&drv->p->klist_devices.k_list)) {
|
||||
|
||||
@ -192,12 +192,12 @@ unsigned long dev_pm_opp_get_max_volt_latency(struct device *dev)
|
||||
if (IS_ERR(opp_table))
|
||||
return 0;
|
||||
|
||||
count = opp_table->regulator_count;
|
||||
|
||||
/* Regulator may not be required for the device */
|
||||
if (!count)
|
||||
if (!opp_table->regulators)
|
||||
goto put_opp_table;
|
||||
|
||||
count = opp_table->regulator_count;
|
||||
|
||||
uV = kmalloc_array(count, sizeof(*uV), GFP_KERNEL);
|
||||
if (!uV)
|
||||
goto put_opp_table;
|
||||
@ -921,6 +921,9 @@ static bool _opp_supported_by_regulators(struct dev_pm_opp *opp,
|
||||
struct regulator *reg;
|
||||
int i;
|
||||
|
||||
if (!opp_table->regulators)
|
||||
return true;
|
||||
|
||||
for (i = 0; i < opp_table->regulator_count; i++) {
|
||||
reg = opp_table->regulators[i];
|
||||
|
||||
@ -1226,7 +1229,7 @@ static int _allocate_set_opp_data(struct opp_table *opp_table)
|
||||
struct dev_pm_set_opp_data *data;
|
||||
int len, count = opp_table->regulator_count;
|
||||
|
||||
if (WARN_ON(!count))
|
||||
if (WARN_ON(!opp_table->regulators))
|
||||
return -EINVAL;
|
||||
|
||||
/* space for set_opp_data */
|
||||
|
||||
@ -668,14 +668,15 @@ drbd_set_role(struct drbd_device *const device, enum drbd_role new_role, int for
|
||||
if (rv == SS_TWO_PRIMARIES) {
|
||||
/* Maybe the peer is detected as dead very soon...
|
||||
retry at most once more in this case. */
|
||||
int timeo;
|
||||
rcu_read_lock();
|
||||
nc = rcu_dereference(connection->net_conf);
|
||||
timeo = nc ? (nc->ping_timeo + 1) * HZ / 10 : 1;
|
||||
rcu_read_unlock();
|
||||
schedule_timeout_interruptible(timeo);
|
||||
if (try < max_tries)
|
||||
if (try < max_tries) {
|
||||
int timeo;
|
||||
try = max_tries - 1;
|
||||
rcu_read_lock();
|
||||
nc = rcu_dereference(connection->net_conf);
|
||||
timeo = nc ? (nc->ping_timeo + 1) * HZ / 10 : 1;
|
||||
rcu_read_unlock();
|
||||
schedule_timeout_interruptible(timeo);
|
||||
}
|
||||
continue;
|
||||
}
|
||||
if (rv < SS_SUCCESS) {
|
||||
|
||||
@ -3361,7 +3361,7 @@ static enum drbd_conns drbd_sync_handshake(struct drbd_peer_device *peer_device,
|
||||
enum drbd_conns rv = C_MASK;
|
||||
enum drbd_disk_state mydisk;
|
||||
struct net_conf *nc;
|
||||
int hg, rule_nr, rr_conflict, tentative;
|
||||
int hg, rule_nr, rr_conflict, tentative, always_asbp;
|
||||
|
||||
mydisk = device->state.disk;
|
||||
if (mydisk == D_NEGOTIATING)
|
||||
@ -3412,8 +3412,12 @@ static enum drbd_conns drbd_sync_handshake(struct drbd_peer_device *peer_device,
|
||||
|
||||
rcu_read_lock();
|
||||
nc = rcu_dereference(peer_device->connection->net_conf);
|
||||
always_asbp = nc->always_asbp;
|
||||
rr_conflict = nc->rr_conflict;
|
||||
tentative = nc->tentative;
|
||||
rcu_read_unlock();
|
||||
|
||||
if (hg == 100 || (hg == -100 && nc->always_asbp)) {
|
||||
if (hg == 100 || (hg == -100 && always_asbp)) {
|
||||
int pcount = (device->state.role == R_PRIMARY)
|
||||
+ (peer_role == R_PRIMARY);
|
||||
int forced = (hg == -100);
|
||||
@ -3452,9 +3456,6 @@ static enum drbd_conns drbd_sync_handshake(struct drbd_peer_device *peer_device,
|
||||
"Sync from %s node\n",
|
||||
(hg < 0) ? "peer" : "this");
|
||||
}
|
||||
rr_conflict = nc->rr_conflict;
|
||||
tentative = nc->tentative;
|
||||
rcu_read_unlock();
|
||||
|
||||
if (hg == -100) {
|
||||
/* FIXME this log message is not correct if we end up here
|
||||
@ -4138,7 +4139,7 @@ static int receive_uuids(struct drbd_connection *connection, struct packet_info
|
||||
kfree(device->p_uuid);
|
||||
device->p_uuid = p_uuid;
|
||||
|
||||
if (device->state.conn < C_CONNECTED &&
|
||||
if ((device->state.conn < C_CONNECTED || device->state.pdsk == D_DISKLESS) &&
|
||||
device->state.disk < D_INCONSISTENT &&
|
||||
device->state.role == R_PRIMARY &&
|
||||
(device->ed_uuid & ~((u64)1)) != (p_uuid[UI_CURRENT] & ~((u64)1))) {
|
||||
|
||||
@ -41,6 +41,8 @@ MODULE_VERSION(DRV_MODULE_VERSION);
|
||||
#define WAITING_FOR_GEN_CMD 0x04
|
||||
#define WAITING_FOR_ANY -1
|
||||
|
||||
#define VDC_MAX_RETRIES 10
|
||||
|
||||
static struct workqueue_struct *sunvdc_wq;
|
||||
|
||||
struct vdc_req_entry {
|
||||
@ -427,6 +429,7 @@ static int __vdc_tx_trigger(struct vdc_port *port)
|
||||
.end_idx = dr->prod,
|
||||
};
|
||||
int err, delay;
|
||||
int retries = 0;
|
||||
|
||||
hdr.seq = dr->snd_nxt;
|
||||
delay = 1;
|
||||
@ -439,6 +442,8 @@ static int __vdc_tx_trigger(struct vdc_port *port)
|
||||
udelay(delay);
|
||||
if ((delay <<= 1) > 128)
|
||||
delay = 128;
|
||||
if (retries++ > VDC_MAX_RETRIES)
|
||||
break;
|
||||
} while (err == -EAGAIN);
|
||||
|
||||
if (err == -ENOTCONN)
|
||||
|
||||
@ -1027,7 +1027,11 @@ static void floppy_release(struct gendisk *disk, fmode_t mode)
|
||||
struct swim3 __iomem *sw = fs->swim3;
|
||||
|
||||
mutex_lock(&swim3_mutex);
|
||||
if (fs->ref_count > 0 && --fs->ref_count == 0) {
|
||||
if (fs->ref_count > 0)
|
||||
--fs->ref_count;
|
||||
else if (fs->ref_count == -1)
|
||||
fs->ref_count = 0;
|
||||
if (fs->ref_count == 0) {
|
||||
swim3_action(fs, MOTOR_OFF);
|
||||
out_8(&sw->control_bic, 0xff);
|
||||
swim3_select(fs, RELAX);
|
||||
|
||||
@ -889,6 +889,7 @@ static void __exit exit_gdrom(void)
|
||||
platform_device_unregister(pd);
|
||||
platform_driver_unregister(&gdrom_driver);
|
||||
kfree(gd.toc);
|
||||
kfree(gd.cd_info);
|
||||
}
|
||||
|
||||
module_init(init_gdrom);
|
||||
|
||||
@ -73,27 +73,32 @@ static void __init clk_boston_setup(struct device_node *np)
|
||||
hw = clk_hw_register_fixed_rate(NULL, "input", NULL, 0, in_freq);
|
||||
if (IS_ERR(hw)) {
|
||||
pr_err("failed to register input clock: %ld\n", PTR_ERR(hw));
|
||||
return;
|
||||
goto error;
|
||||
}
|
||||
onecell->hws[BOSTON_CLK_INPUT] = hw;
|
||||
|
||||
hw = clk_hw_register_fixed_rate(NULL, "sys", "input", 0, sys_freq);
|
||||
if (IS_ERR(hw)) {
|
||||
pr_err("failed to register sys clock: %ld\n", PTR_ERR(hw));
|
||||
return;
|
||||
goto error;
|
||||
}
|
||||
onecell->hws[BOSTON_CLK_SYS] = hw;
|
||||
|
||||
hw = clk_hw_register_fixed_rate(NULL, "cpu", "input", 0, cpu_freq);
|
||||
if (IS_ERR(hw)) {
|
||||
pr_err("failed to register cpu clock: %ld\n", PTR_ERR(hw));
|
||||
return;
|
||||
goto error;
|
||||
}
|
||||
onecell->hws[BOSTON_CLK_CPU] = hw;
|
||||
|
||||
err = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, onecell);
|
||||
if (err)
|
||||
pr_err("failed to add DT provider: %d\n", err);
|
||||
|
||||
return;
|
||||
|
||||
error:
|
||||
kfree(onecell);
|
||||
}
|
||||
|
||||
/*
|
||||
|
||||
@ -17,6 +17,8 @@
|
||||
|
||||
#include "clk.h"
|
||||
|
||||
#define CCDR 0x4
|
||||
#define BM_CCM_CCDR_MMDC_CH0_MASK (1 << 17)
|
||||
#define CCSR 0xc
|
||||
#define BM_CCSR_PLL1_SW_CLK_SEL (1 << 2)
|
||||
#define CACRR 0x10
|
||||
@ -414,6 +416,10 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
|
||||
clks[IMX6SL_CLK_USDHC3] = imx_clk_gate2("usdhc3", "usdhc3_podf", base + 0x80, 6);
|
||||
clks[IMX6SL_CLK_USDHC4] = imx_clk_gate2("usdhc4", "usdhc4_podf", base + 0x80, 8);
|
||||
|
||||
/* Ensure the MMDC CH0 handshake is bypassed */
|
||||
writel_relaxed(readl_relaxed(base + CCDR) |
|
||||
BM_CCM_CCDR_MMDC_CH0_MASK, base + CCDR);
|
||||
|
||||
imx_check_clocks(clks, ARRAY_SIZE(clks));
|
||||
|
||||
clk_data.clks = clks;
|
||||
|
||||
@ -366,10 +366,10 @@ static SUNXI_CCU_MP_WITH_MUX_GATE(spi1_clk, "spi1", mod0_default_parents, 0x0a4,
|
||||
static const char * const i2s_parents[] = { "pll-audio-8x", "pll-audio-4x",
|
||||
"pll-audio-2x", "pll-audio" };
|
||||
static SUNXI_CCU_MUX_WITH_GATE(i2s0_clk, "i2s0", i2s_parents,
|
||||
0x0b0, 16, 2, BIT(31), 0);
|
||||
0x0b0, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
|
||||
|
||||
static SUNXI_CCU_MUX_WITH_GATE(i2s1_clk, "i2s1", i2s_parents,
|
||||
0x0b4, 16, 2, BIT(31), 0);
|
||||
0x0b4, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
|
||||
|
||||
/* TODO: the parent for most of the USB clocks is not known */
|
||||
static SUNXI_CCU_GATE(usb_phy0_clk, "usb-phy0", "osc24M",
|
||||
@ -446,7 +446,7 @@ static SUNXI_CCU_M_WITH_GATE(ve_clk, "ve", "pll-ve",
|
||||
static SUNXI_CCU_GATE(ac_dig_clk, "ac-dig", "pll-audio",
|
||||
0x140, BIT(31), CLK_SET_RATE_PARENT);
|
||||
static SUNXI_CCU_GATE(ac_dig_4x_clk, "ac-dig-4x", "pll-audio-4x",
|
||||
0x140, BIT(30), 0);
|
||||
0x140, BIT(30), CLK_SET_RATE_PARENT);
|
||||
static SUNXI_CCU_GATE(avs_clk, "avs", "osc24M",
|
||||
0x144, BIT(31), 0);
|
||||
|
||||
|
||||
@ -167,6 +167,7 @@ static int __init bl_idle_init(void)
|
||||
{
|
||||
int ret;
|
||||
struct device_node *root = of_find_node_by_path("/");
|
||||
const struct of_device_id *match_id;
|
||||
|
||||
if (!root)
|
||||
return -ENODEV;
|
||||
@ -174,7 +175,11 @@ static int __init bl_idle_init(void)
|
||||
/*
|
||||
* Initialize the driver just for a compliant set of machines
|
||||
*/
|
||||
if (!of_match_node(compatible_machine_match, root))
|
||||
match_id = of_match_node(compatible_machine_match, root);
|
||||
|
||||
of_node_put(root);
|
||||
|
||||
if (!match_id)
|
||||
return -ENODEV;
|
||||
|
||||
if (!mcpm_is_available())
|
||||
|
||||
@ -555,7 +555,7 @@ static int cryp_set_dma_transfer(struct cryp_ctx *ctx,
|
||||
desc = dmaengine_prep_slave_sg(channel,
|
||||
ctx->device->dma.sg_src,
|
||||
ctx->device->dma.sg_src_len,
|
||||
direction, DMA_CTRL_ACK);
|
||||
DMA_MEM_TO_DEV, DMA_CTRL_ACK);
|
||||
break;
|
||||
|
||||
case DMA_FROM_DEVICE:
|
||||
@ -579,7 +579,7 @@ static int cryp_set_dma_transfer(struct cryp_ctx *ctx,
|
||||
desc = dmaengine_prep_slave_sg(channel,
|
||||
ctx->device->dma.sg_dst,
|
||||
ctx->device->dma.sg_dst_len,
|
||||
direction,
|
||||
DMA_DEV_TO_MEM,
|
||||
DMA_CTRL_ACK |
|
||||
DMA_PREP_INTERRUPT);
|
||||
|
||||
|
||||
@ -165,7 +165,7 @@ static int hash_set_dma_transfer(struct hash_ctx *ctx, struct scatterlist *sg,
|
||||
__func__);
|
||||
desc = dmaengine_prep_slave_sg(channel,
|
||||
ctx->device->dma.sg, ctx->device->dma.sg_len,
|
||||
direction, DMA_CTRL_ACK | DMA_PREP_INTERRUPT);
|
||||
DMA_MEM_TO_DEV, DMA_CTRL_ACK | DMA_PREP_INTERRUPT);
|
||||
if (!desc) {
|
||||
dev_err(ctx->device->dev,
|
||||
"%s: dmaengine_prep_slave_sg() failed!\n", __func__);
|
||||
|
||||
@ -415,38 +415,32 @@ static void bcm2835_dma_fill_cb_chain_with_sg(
|
||||
}
|
||||
}
|
||||
|
||||
static int bcm2835_dma_abort(void __iomem *chan_base)
|
||||
static int bcm2835_dma_abort(struct bcm2835_chan *c)
|
||||
{
|
||||
unsigned long cs;
|
||||
void __iomem *chan_base = c->chan_base;
|
||||
long int timeout = 10000;
|
||||
|
||||
cs = readl(chan_base + BCM2835_DMA_CS);
|
||||
if (!(cs & BCM2835_DMA_ACTIVE))
|
||||
/*
|
||||
* A zero control block address means the channel is idle.
|
||||
* (The ACTIVE flag in the CS register is not a reliable indicator.)
|
||||
*/
|
||||
if (!readl(chan_base + BCM2835_DMA_ADDR))
|
||||
return 0;
|
||||
|
||||
/* Write 0 to the active bit - Pause the DMA */
|
||||
writel(0, chan_base + BCM2835_DMA_CS);
|
||||
|
||||
/* Wait for any current AXI transfer to complete */
|
||||
while ((cs & BCM2835_DMA_ISPAUSED) && --timeout) {
|
||||
while ((readl(chan_base + BCM2835_DMA_CS) &
|
||||
BCM2835_DMA_WAITING_FOR_WRITES) && --timeout)
|
||||
cpu_relax();
|
||||
cs = readl(chan_base + BCM2835_DMA_CS);
|
||||
}
|
||||
|
||||
/* We'll un-pause when we set of our next DMA */
|
||||
/* Peripheral might be stuck and fail to signal AXI write responses */
|
||||
if (!timeout)
|
||||
return -ETIMEDOUT;
|
||||
|
||||
if (!(cs & BCM2835_DMA_ACTIVE))
|
||||
return 0;
|
||||
|
||||
/* Terminate the control block chain */
|
||||
writel(0, chan_base + BCM2835_DMA_NEXTCB);
|
||||
|
||||
/* Abort the whole DMA */
|
||||
writel(BCM2835_DMA_ABORT | BCM2835_DMA_ACTIVE,
|
||||
chan_base + BCM2835_DMA_CS);
|
||||
dev_err(c->vc.chan.device->dev,
|
||||
"failed to complete outstanding writes\n");
|
||||
|
||||
writel(BCM2835_DMA_RESET, chan_base + BCM2835_DMA_CS);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -485,8 +479,15 @@ static irqreturn_t bcm2835_dma_callback(int irq, void *data)
|
||||
|
||||
spin_lock_irqsave(&c->vc.lock, flags);
|
||||
|
||||
/* Acknowledge interrupt */
|
||||
writel(BCM2835_DMA_INT, c->chan_base + BCM2835_DMA_CS);
|
||||
/*
|
||||
* Clear the INT flag to receive further interrupts. Keep the channel
|
||||
* active in case the descriptor is cyclic or in case the client has
|
||||
* already terminated the descriptor and issued a new one. (May happen
|
||||
* if this IRQ handler is threaded.) If the channel is finished, it
|
||||
* will remain idle despite the ACTIVE flag being set.
|
||||
*/
|
||||
writel(BCM2835_DMA_INT | BCM2835_DMA_ACTIVE,
|
||||
c->chan_base + BCM2835_DMA_CS);
|
||||
|
||||
d = c->desc;
|
||||
|
||||
@ -494,11 +495,7 @@ static irqreturn_t bcm2835_dma_callback(int irq, void *data)
|
||||
if (d->cyclic) {
|
||||
/* call the cyclic callback */
|
||||
vchan_cyclic_callback(&d->vd);
|
||||
|
||||
/* Keep the DMA engine running */
|
||||
writel(BCM2835_DMA_ACTIVE,
|
||||
c->chan_base + BCM2835_DMA_CS);
|
||||
} else {
|
||||
} else if (!readl(c->chan_base + BCM2835_DMA_ADDR)) {
|
||||
vchan_cookie_complete(&c->desc->vd);
|
||||
bcm2835_dma_start_desc(c);
|
||||
}
|
||||
@ -796,7 +793,6 @@ static int bcm2835_dma_terminate_all(struct dma_chan *chan)
|
||||
struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
|
||||
struct bcm2835_dmadev *d = to_bcm2835_dma_dev(c->vc.chan.device);
|
||||
unsigned long flags;
|
||||
int timeout = 10000;
|
||||
LIST_HEAD(head);
|
||||
|
||||
spin_lock_irqsave(&c->vc.lock, flags);
|
||||
@ -806,27 +802,11 @@ static int bcm2835_dma_terminate_all(struct dma_chan *chan)
|
||||
list_del_init(&c->node);
|
||||
spin_unlock(&d->lock);
|
||||
|
||||
/*
|
||||
* Stop DMA activity: we assume the callback will not be called
|
||||
* after bcm_dma_abort() returns (even if it does, it will see
|
||||
* c->desc is NULL and exit.)
|
||||
*/
|
||||
/* stop DMA activity */
|
||||
if (c->desc) {
|
||||
bcm2835_dma_desc_free(&c->desc->vd);
|
||||
c->desc = NULL;
|
||||
bcm2835_dma_abort(c->chan_base);
|
||||
|
||||
/* Wait for stopping */
|
||||
while (--timeout) {
|
||||
if (!(readl(c->chan_base + BCM2835_DMA_CS) &
|
||||
BCM2835_DMA_ACTIVE))
|
||||
break;
|
||||
|
||||
cpu_relax();
|
||||
}
|
||||
|
||||
if (!timeout)
|
||||
dev_err(d->ddev.dev, "DMA transfer could not be terminated\n");
|
||||
bcm2835_dma_abort(c);
|
||||
}
|
||||
|
||||
vchan_get_all_descriptors(&c->vc, &head);
|
||||
|
||||
@ -623,7 +623,7 @@ static void imxdma_tasklet(unsigned long data)
|
||||
{
|
||||
struct imxdma_channel *imxdmac = (void *)data;
|
||||
struct imxdma_engine *imxdma = imxdmac->imxdma;
|
||||
struct imxdma_desc *desc;
|
||||
struct imxdma_desc *desc, *next_desc;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&imxdma->lock, flags);
|
||||
@ -653,10 +653,10 @@ static void imxdma_tasklet(unsigned long data)
|
||||
list_move_tail(imxdmac->ld_active.next, &imxdmac->ld_free);
|
||||
|
||||
if (!list_empty(&imxdmac->ld_queue)) {
|
||||
desc = list_first_entry(&imxdmac->ld_queue, struct imxdma_desc,
|
||||
node);
|
||||
next_desc = list_first_entry(&imxdmac->ld_queue,
|
||||
struct imxdma_desc, node);
|
||||
list_move_tail(imxdmac->ld_queue.next, &imxdmac->ld_active);
|
||||
if (imxdma_xfer_desc(desc) < 0)
|
||||
if (imxdma_xfer_desc(next_desc) < 0)
|
||||
dev_warn(imxdma->dev, "%s: channel: %d couldn't xfer desc\n",
|
||||
__func__, imxdmac->channel);
|
||||
}
|
||||
|
||||
@ -159,7 +159,7 @@ struct zynqmp_dma_desc_ll {
|
||||
u32 ctrl;
|
||||
u64 nxtdscraddr;
|
||||
u64 rsvd;
|
||||
}; __aligned(64)
|
||||
};
|
||||
|
||||
/**
|
||||
* struct zynqmp_dma_desc_sw - Per Transaction structure
|
||||
|
||||
@ -318,7 +318,12 @@ EXPORT_SYMBOL_GPL(efivar_variable_is_removable);
|
||||
static efi_status_t
|
||||
check_var_size(u32 attributes, unsigned long size)
|
||||
{
|
||||
const struct efivar_operations *fops = __efivars->ops;
|
||||
const struct efivar_operations *fops;
|
||||
|
||||
if (!__efivars)
|
||||
return EFI_UNSUPPORTED;
|
||||
|
||||
fops = __efivars->ops;
|
||||
|
||||
if (!fops->query_variable_store)
|
||||
return EFI_UNSUPPORTED;
|
||||
@ -329,7 +334,12 @@ check_var_size(u32 attributes, unsigned long size)
|
||||
static efi_status_t
|
||||
check_var_size_nonblocking(u32 attributes, unsigned long size)
|
||||
{
|
||||
const struct efivar_operations *fops = __efivars->ops;
|
||||
const struct efivar_operations *fops;
|
||||
|
||||
if (!__efivars)
|
||||
return EFI_UNSUPPORTED;
|
||||
|
||||
fops = __efivars->ops;
|
||||
|
||||
if (!fops->query_variable_store)
|
||||
return EFI_UNSUPPORTED;
|
||||
@ -429,13 +439,18 @@ static void dup_variable_bug(efi_char16_t *str16, efi_guid_t *vendor_guid,
|
||||
int efivar_init(int (*func)(efi_char16_t *, efi_guid_t, unsigned long, void *),
|
||||
void *data, bool duplicates, struct list_head *head)
|
||||
{
|
||||
const struct efivar_operations *ops = __efivars->ops;
|
||||
const struct efivar_operations *ops;
|
||||
unsigned long variable_name_size = 1024;
|
||||
efi_char16_t *variable_name;
|
||||
efi_status_t status;
|
||||
efi_guid_t vendor_guid;
|
||||
int err = 0;
|
||||
|
||||
if (!__efivars)
|
||||
return -EFAULT;
|
||||
|
||||
ops = __efivars->ops;
|
||||
|
||||
variable_name = kzalloc(variable_name_size, GFP_KERNEL);
|
||||
if (!variable_name) {
|
||||
printk(KERN_ERR "efivars: Memory allocation failed.\n");
|
||||
@ -583,12 +598,14 @@ static void efivar_entry_list_del_unlock(struct efivar_entry *entry)
|
||||
*/
|
||||
int __efivar_entry_delete(struct efivar_entry *entry)
|
||||
{
|
||||
const struct efivar_operations *ops = __efivars->ops;
|
||||
efi_status_t status;
|
||||
|
||||
status = ops->set_variable(entry->var.VariableName,
|
||||
&entry->var.VendorGuid,
|
||||
0, 0, NULL);
|
||||
if (!__efivars)
|
||||
return -EINVAL;
|
||||
|
||||
status = __efivars->ops->set_variable(entry->var.VariableName,
|
||||
&entry->var.VendorGuid,
|
||||
0, 0, NULL);
|
||||
|
||||
return efi_status_to_err(status);
|
||||
}
|
||||
@ -607,12 +624,17 @@ EXPORT_SYMBOL_GPL(__efivar_entry_delete);
|
||||
*/
|
||||
int efivar_entry_delete(struct efivar_entry *entry)
|
||||
{
|
||||
const struct efivar_operations *ops = __efivars->ops;
|
||||
const struct efivar_operations *ops;
|
||||
efi_status_t status;
|
||||
|
||||
if (down_interruptible(&efivars_lock))
|
||||
return -EINTR;
|
||||
|
||||
if (!__efivars) {
|
||||
up(&efivars_lock);
|
||||
return -EINVAL;
|
||||
}
|
||||
ops = __efivars->ops;
|
||||
status = ops->set_variable(entry->var.VariableName,
|
||||
&entry->var.VendorGuid,
|
||||
0, 0, NULL);
|
||||
@ -650,13 +672,19 @@ EXPORT_SYMBOL_GPL(efivar_entry_delete);
|
||||
int efivar_entry_set(struct efivar_entry *entry, u32 attributes,
|
||||
unsigned long size, void *data, struct list_head *head)
|
||||
{
|
||||
const struct efivar_operations *ops = __efivars->ops;
|
||||
const struct efivar_operations *ops;
|
||||
efi_status_t status;
|
||||
efi_char16_t *name = entry->var.VariableName;
|
||||
efi_guid_t vendor = entry->var.VendorGuid;
|
||||
|
||||
if (down_interruptible(&efivars_lock))
|
||||
return -EINTR;
|
||||
|
||||
if (!__efivars) {
|
||||
up(&efivars_lock);
|
||||
return -EINVAL;
|
||||
}
|
||||
ops = __efivars->ops;
|
||||
if (head && efivar_entry_find(name, vendor, head, false)) {
|
||||
up(&efivars_lock);
|
||||
return -EEXIST;
|
||||
@ -687,12 +715,17 @@ static int
|
||||
efivar_entry_set_nonblocking(efi_char16_t *name, efi_guid_t vendor,
|
||||
u32 attributes, unsigned long size, void *data)
|
||||
{
|
||||
const struct efivar_operations *ops = __efivars->ops;
|
||||
const struct efivar_operations *ops;
|
||||
efi_status_t status;
|
||||
|
||||
if (down_trylock(&efivars_lock))
|
||||
return -EBUSY;
|
||||
|
||||
if (!__efivars) {
|
||||
up(&efivars_lock);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
status = check_var_size_nonblocking(attributes,
|
||||
size + ucs2_strsize(name, 1024));
|
||||
if (status != EFI_SUCCESS) {
|
||||
@ -700,6 +733,7 @@ efivar_entry_set_nonblocking(efi_char16_t *name, efi_guid_t vendor,
|
||||
return -ENOSPC;
|
||||
}
|
||||
|
||||
ops = __efivars->ops;
|
||||
status = ops->set_variable_nonblocking(name, &vendor, attributes,
|
||||
size, data);
|
||||
|
||||
@ -727,9 +761,13 @@ efivar_entry_set_nonblocking(efi_char16_t *name, efi_guid_t vendor,
|
||||
int efivar_entry_set_safe(efi_char16_t *name, efi_guid_t vendor, u32 attributes,
|
||||
bool block, unsigned long size, void *data)
|
||||
{
|
||||
const struct efivar_operations *ops = __efivars->ops;
|
||||
const struct efivar_operations *ops;
|
||||
efi_status_t status;
|
||||
|
||||
if (!__efivars)
|
||||
return -EINVAL;
|
||||
|
||||
ops = __efivars->ops;
|
||||
if (!ops->query_variable_store)
|
||||
return -ENOSYS;
|
||||
|
||||
@ -829,13 +867,18 @@ EXPORT_SYMBOL_GPL(efivar_entry_find);
|
||||
*/
|
||||
int efivar_entry_size(struct efivar_entry *entry, unsigned long *size)
|
||||
{
|
||||
const struct efivar_operations *ops = __efivars->ops;
|
||||
const struct efivar_operations *ops;
|
||||
efi_status_t status;
|
||||
|
||||
*size = 0;
|
||||
|
||||
if (down_interruptible(&efivars_lock))
|
||||
return -EINTR;
|
||||
if (!__efivars) {
|
||||
up(&efivars_lock);
|
||||
return -EINVAL;
|
||||
}
|
||||
ops = __efivars->ops;
|
||||
status = ops->get_variable(entry->var.VariableName,
|
||||
&entry->var.VendorGuid, NULL, size, NULL);
|
||||
up(&efivars_lock);
|
||||
@ -861,12 +904,14 @@ EXPORT_SYMBOL_GPL(efivar_entry_size);
|
||||
int __efivar_entry_get(struct efivar_entry *entry, u32 *attributes,
|
||||
unsigned long *size, void *data)
|
||||
{
|
||||
const struct efivar_operations *ops = __efivars->ops;
|
||||
efi_status_t status;
|
||||
|
||||
status = ops->get_variable(entry->var.VariableName,
|
||||
&entry->var.VendorGuid,
|
||||
attributes, size, data);
|
||||
if (!__efivars)
|
||||
return -EINVAL;
|
||||
|
||||
status = __efivars->ops->get_variable(entry->var.VariableName,
|
||||
&entry->var.VendorGuid,
|
||||
attributes, size, data);
|
||||
|
||||
return efi_status_to_err(status);
|
||||
}
|
||||
@ -882,14 +927,19 @@ EXPORT_SYMBOL_GPL(__efivar_entry_get);
|
||||
int efivar_entry_get(struct efivar_entry *entry, u32 *attributes,
|
||||
unsigned long *size, void *data)
|
||||
{
|
||||
const struct efivar_operations *ops = __efivars->ops;
|
||||
efi_status_t status;
|
||||
|
||||
if (down_interruptible(&efivars_lock))
|
||||
return -EINTR;
|
||||
status = ops->get_variable(entry->var.VariableName,
|
||||
&entry->var.VendorGuid,
|
||||
attributes, size, data);
|
||||
|
||||
if (!__efivars) {
|
||||
up(&efivars_lock);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
status = __efivars->ops->get_variable(entry->var.VariableName,
|
||||
&entry->var.VendorGuid,
|
||||
attributes, size, data);
|
||||
up(&efivars_lock);
|
||||
|
||||
return efi_status_to_err(status);
|
||||
@ -921,7 +971,7 @@ EXPORT_SYMBOL_GPL(efivar_entry_get);
|
||||
int efivar_entry_set_get_size(struct efivar_entry *entry, u32 attributes,
|
||||
unsigned long *size, void *data, bool *set)
|
||||
{
|
||||
const struct efivar_operations *ops = __efivars->ops;
|
||||
const struct efivar_operations *ops;
|
||||
efi_char16_t *name = entry->var.VariableName;
|
||||
efi_guid_t *vendor = &entry->var.VendorGuid;
|
||||
efi_status_t status;
|
||||
@ -940,6 +990,11 @@ int efivar_entry_set_get_size(struct efivar_entry *entry, u32 attributes,
|
||||
if (down_interruptible(&efivars_lock))
|
||||
return -EINTR;
|
||||
|
||||
if (!__efivars) {
|
||||
err = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/*
|
||||
* Ensure that the available space hasn't shrunk below the safe level
|
||||
*/
|
||||
@ -956,6 +1011,8 @@ int efivar_entry_set_get_size(struct efivar_entry *entry, u32 attributes,
|
||||
}
|
||||
}
|
||||
|
||||
ops = __efivars->ops;
|
||||
|
||||
status = ops->set_variable(name, vendor, attributes, *size, data);
|
||||
if (status != EFI_SUCCESS) {
|
||||
err = efi_status_to_err(status);
|
||||
|
||||
@ -404,6 +404,7 @@ static int altera_cvp_probe(struct pci_dev *pdev,
|
||||
{
|
||||
struct altera_cvp_conf *conf;
|
||||
u16 cmd, val;
|
||||
u32 regval;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
@ -417,6 +418,14 @@ static int altera_cvp_probe(struct pci_dev *pdev,
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
pci_read_config_dword(pdev, VSE_CVP_STATUS, ®val);
|
||||
if (!(regval & VSE_CVP_STATUS_CVP_EN)) {
|
||||
dev_err(&pdev->dev,
|
||||
"CVP is disabled for this device: CVP_STATUS Reg 0x%x\n",
|
||||
regval);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
conf = devm_kzalloc(&pdev->dev, sizeof(*conf), GFP_KERNEL);
|
||||
if (!conf)
|
||||
return -ENOMEM;
|
||||
|
||||
@ -2899,7 +2899,7 @@ EXPORT_SYMBOL(drm_atomic_helper_suspend);
|
||||
int drm_atomic_helper_commit_duplicated_state(struct drm_atomic_state *state,
|
||||
struct drm_modeset_acquire_ctx *ctx)
|
||||
{
|
||||
int i;
|
||||
int i, ret;
|
||||
struct drm_plane *plane;
|
||||
struct drm_plane_state *new_plane_state;
|
||||
struct drm_connector *connector;
|
||||
@ -2918,7 +2918,11 @@ int drm_atomic_helper_commit_duplicated_state(struct drm_atomic_state *state,
|
||||
for_each_new_connector_in_state(state, connector, new_conn_state, i)
|
||||
state->connectors[i].old_state = connector->state;
|
||||
|
||||
return drm_atomic_commit(state);
|
||||
ret = drm_atomic_commit(state);
|
||||
|
||||
state->acquire_ctx = NULL;
|
||||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(drm_atomic_helper_commit_duplicated_state);
|
||||
|
||||
|
||||
@ -36,6 +36,8 @@
|
||||
#include <drm/drmP.h>
|
||||
#include "drm_legacy.h"
|
||||
|
||||
#include <linux/nospec.h>
|
||||
|
||||
static struct drm_map_list *drm_find_matching_map(struct drm_device *dev,
|
||||
struct drm_local_map *map)
|
||||
{
|
||||
@ -1417,6 +1419,7 @@ int drm_legacy_freebufs(struct drm_device *dev, void *data,
|
||||
idx, dma->buf_count - 1);
|
||||
return -EINVAL;
|
||||
}
|
||||
idx = array_index_nospec(idx, dma->buf_count);
|
||||
buf = dma->buflist[idx];
|
||||
if (buf->file_priv != file_priv) {
|
||||
DRM_ERROR("Process %d freeing buffer not owned\n",
|
||||
|
||||
@ -147,7 +147,7 @@ static int cdn_dp_mailbox_validate_receive(struct cdn_dp_device *dp,
|
||||
}
|
||||
|
||||
static int cdn_dp_mailbox_read_receive(struct cdn_dp_device *dp,
|
||||
u8 *buff, u8 buff_size)
|
||||
u8 *buff, u16 buff_size)
|
||||
{
|
||||
u32 i;
|
||||
int ret;
|
||||
|
||||
@ -347,12 +347,14 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
|
||||
vc4_get_scaling_mode(vc4_state->src_h[1],
|
||||
vc4_state->crtc_h);
|
||||
|
||||
/* YUV conversion requires that horizontal scaling be enabled,
|
||||
* even on a plane that's otherwise 1:1. Looks like only PPF
|
||||
* works in that case, so let's pick that one.
|
||||
/* YUV conversion requires that horizontal scaling be enabled
|
||||
* on the UV plane even if vc4_get_scaling_mode() returned
|
||||
* VC4_SCALING_NONE (which can happen when the down-scaling
|
||||
* ratio is 0.5). Let's force it to VC4_SCALING_PPF in this
|
||||
* case.
|
||||
*/
|
||||
if (vc4_state->is_unity)
|
||||
vc4_state->x_scaling[0] = VC4_SCALING_PPF;
|
||||
if (vc4_state->x_scaling[1] == VC4_SCALING_NONE)
|
||||
vc4_state->x_scaling[1] = VC4_SCALING_PPF;
|
||||
} else {
|
||||
vc4_state->is_yuv = false;
|
||||
vc4_state->x_scaling[1] = VC4_SCALING_NONE;
|
||||
|
||||
@ -472,31 +472,31 @@ static int __init vgem_init(void)
|
||||
if (!vgem_device)
|
||||
return -ENOMEM;
|
||||
|
||||
ret = drm_dev_init(&vgem_device->drm, &vgem_driver, NULL);
|
||||
if (ret)
|
||||
goto out_free;
|
||||
|
||||
vgem_device->platform =
|
||||
platform_device_register_simple("vgem", -1, NULL, 0);
|
||||
if (IS_ERR(vgem_device->platform)) {
|
||||
ret = PTR_ERR(vgem_device->platform);
|
||||
goto out_fini;
|
||||
goto out_free;
|
||||
}
|
||||
|
||||
dma_coerce_mask_and_coherent(&vgem_device->platform->dev,
|
||||
DMA_BIT_MASK(64));
|
||||
ret = drm_dev_init(&vgem_device->drm, &vgem_driver,
|
||||
&vgem_device->platform->dev);
|
||||
if (ret)
|
||||
goto out_unregister;
|
||||
|
||||
/* Final step: expose the device/driver to userspace */
|
||||
ret = drm_dev_register(&vgem_device->drm, 0);
|
||||
if (ret)
|
||||
goto out_unregister;
|
||||
goto out_fini;
|
||||
|
||||
return 0;
|
||||
|
||||
out_unregister:
|
||||
platform_device_unregister(vgem_device->platform);
|
||||
out_fini:
|
||||
drm_dev_fini(&vgem_device->drm);
|
||||
out_unregister:
|
||||
platform_device_unregister(vgem_device->platform);
|
||||
out_free:
|
||||
kfree(vgem_device);
|
||||
return ret;
|
||||
|
||||
@ -1518,7 +1518,7 @@ unlock:
|
||||
EXPORT_SYMBOL_GPL(ipu_image_convert_queue);
|
||||
|
||||
/* Abort any active or pending conversions for this context */
|
||||
void ipu_image_convert_abort(struct ipu_image_convert_ctx *ctx)
|
||||
static void __ipu_image_convert_abort(struct ipu_image_convert_ctx *ctx)
|
||||
{
|
||||
struct ipu_image_convert_chan *chan = ctx->chan;
|
||||
struct ipu_image_convert_priv *priv = chan->priv;
|
||||
@ -1545,7 +1545,7 @@ void ipu_image_convert_abort(struct ipu_image_convert_ctx *ctx)
|
||||
|
||||
need_abort = (run_count || active_run);
|
||||
|
||||
ctx->aborting = need_abort;
|
||||
ctx->aborting = true;
|
||||
|
||||
spin_unlock_irqrestore(&chan->irqlock, flags);
|
||||
|
||||
@ -1566,7 +1566,11 @@ void ipu_image_convert_abort(struct ipu_image_convert_ctx *ctx)
|
||||
dev_warn(priv->ipu->dev, "%s: timeout\n", __func__);
|
||||
force_abort(ctx);
|
||||
}
|
||||
}
|
||||
|
||||
void ipu_image_convert_abort(struct ipu_image_convert_ctx *ctx)
|
||||
{
|
||||
__ipu_image_convert_abort(ctx);
|
||||
ctx->aborting = false;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ipu_image_convert_abort);
|
||||
@ -1580,7 +1584,7 @@ void ipu_image_convert_unprepare(struct ipu_image_convert_ctx *ctx)
|
||||
bool put_res;
|
||||
|
||||
/* make sure no runs are hanging around */
|
||||
ipu_image_convert_abort(ctx);
|
||||
__ipu_image_convert_abort(ctx);
|
||||
|
||||
dev_dbg(priv->ipu->dev, "%s: task %u: removing ctx %p\n", __func__,
|
||||
chan->ic_task, ctx);
|
||||
|
||||
@ -743,7 +743,9 @@ static int lenovo_probe_tpkbd(struct hid_device *hdev)
|
||||
data_pointer->led_mute.brightness_get = lenovo_led_brightness_get_tpkbd;
|
||||
data_pointer->led_mute.brightness_set = lenovo_led_brightness_set_tpkbd;
|
||||
data_pointer->led_mute.dev = dev;
|
||||
led_classdev_register(dev, &data_pointer->led_mute);
|
||||
ret = led_classdev_register(dev, &data_pointer->led_mute);
|
||||
if (ret < 0)
|
||||
goto err;
|
||||
|
||||
data_pointer->led_micmute.name = name_micmute;
|
||||
data_pointer->led_micmute.brightness_get =
|
||||
@ -751,7 +753,11 @@ static int lenovo_probe_tpkbd(struct hid_device *hdev)
|
||||
data_pointer->led_micmute.brightness_set =
|
||||
lenovo_led_brightness_set_tpkbd;
|
||||
data_pointer->led_micmute.dev = dev;
|
||||
led_classdev_register(dev, &data_pointer->led_micmute);
|
||||
ret = led_classdev_register(dev, &data_pointer->led_micmute);
|
||||
if (ret < 0) {
|
||||
led_classdev_unregister(&data_pointer->led_mute);
|
||||
goto err;
|
||||
}
|
||||
|
||||
lenovo_features_set_tpkbd(hdev);
|
||||
|
||||
|
||||
@ -360,9 +360,11 @@ static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
|
||||
struct i2c_client *client = data->client;
|
||||
unsigned long min, val;
|
||||
u8 reg;
|
||||
int err = kstrtoul(buf, 10, &val);
|
||||
if (err < 0)
|
||||
return err;
|
||||
int rv;
|
||||
|
||||
rv = kstrtoul(buf, 10, &val);
|
||||
if (rv < 0)
|
||||
return rv;
|
||||
|
||||
/* Save fan_min */
|
||||
mutex_lock(&data->update_lock);
|
||||
@ -390,8 +392,11 @@ static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
reg = (lm80_read_value(client, LM80_REG_FANDIV) &
|
||||
~(3 << (2 * (nr + 1)))) | (data->fan_div[nr] << (2 * (nr + 1)));
|
||||
rv = lm80_read_value(client, LM80_REG_FANDIV);
|
||||
if (rv < 0)
|
||||
return rv;
|
||||
reg = (rv & ~(3 << (2 * (nr + 1))))
|
||||
| (data->fan_div[nr] << (2 * (nr + 1)));
|
||||
lm80_write_value(client, LM80_REG_FANDIV, reg);
|
||||
|
||||
/* Restore fan_min */
|
||||
@ -623,6 +628,7 @@ static int lm80_probe(struct i2c_client *client,
|
||||
struct device *dev = &client->dev;
|
||||
struct device *hwmon_dev;
|
||||
struct lm80_data *data;
|
||||
int rv;
|
||||
|
||||
data = devm_kzalloc(dev, sizeof(struct lm80_data), GFP_KERNEL);
|
||||
if (!data)
|
||||
@ -635,8 +641,14 @@ static int lm80_probe(struct i2c_client *client,
|
||||
lm80_init_client(client);
|
||||
|
||||
/* A few vars need to be filled upon startup */
|
||||
data->fan[f_min][0] = lm80_read_value(client, LM80_REG_FAN_MIN(1));
|
||||
data->fan[f_min][1] = lm80_read_value(client, LM80_REG_FAN_MIN(2));
|
||||
rv = lm80_read_value(client, LM80_REG_FAN_MIN(1));
|
||||
if (rv < 0)
|
||||
return rv;
|
||||
data->fan[f_min][0] = rv;
|
||||
rv = lm80_read_value(client, LM80_REG_FAN_MIN(2));
|
||||
if (rv < 0)
|
||||
return rv;
|
||||
data->fan[f_min][1] = rv;
|
||||
|
||||
hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
|
||||
data, lm80_groups);
|
||||
|
||||
@ -296,22 +296,7 @@ static irqreturn_t axxia_i2c_isr(int irq, void *_dev)
|
||||
i2c_int_disable(idev, MST_STATUS_TFL);
|
||||
}
|
||||
|
||||
if (status & MST_STATUS_SCC) {
|
||||
/* Stop completed */
|
||||
i2c_int_disable(idev, ~MST_STATUS_TSS);
|
||||
complete(&idev->msg_complete);
|
||||
} else if (status & MST_STATUS_SNS) {
|
||||
/* Transfer done */
|
||||
i2c_int_disable(idev, ~MST_STATUS_TSS);
|
||||
if (i2c_m_rd(idev->msg) && idev->msg_xfrd < idev->msg->len)
|
||||
axxia_i2c_empty_rx_fifo(idev);
|
||||
complete(&idev->msg_complete);
|
||||
} else if (status & MST_STATUS_TSS) {
|
||||
/* Transfer timeout */
|
||||
idev->msg_err = -ETIMEDOUT;
|
||||
i2c_int_disable(idev, ~MST_STATUS_TSS);
|
||||
complete(&idev->msg_complete);
|
||||
} else if (unlikely(status & MST_STATUS_ERR)) {
|
||||
if (unlikely(status & MST_STATUS_ERR)) {
|
||||
/* Transfer error */
|
||||
i2c_int_disable(idev, ~0);
|
||||
if (status & MST_STATUS_AL)
|
||||
@ -328,6 +313,21 @@ static irqreturn_t axxia_i2c_isr(int irq, void *_dev)
|
||||
readl(idev->base + MST_TX_BYTES_XFRD),
|
||||
readl(idev->base + MST_TX_XFER));
|
||||
complete(&idev->msg_complete);
|
||||
} else if (status & MST_STATUS_SCC) {
|
||||
/* Stop completed */
|
||||
i2c_int_disable(idev, ~MST_STATUS_TSS);
|
||||
complete(&idev->msg_complete);
|
||||
} else if (status & MST_STATUS_SNS) {
|
||||
/* Transfer done */
|
||||
i2c_int_disable(idev, ~MST_STATUS_TSS);
|
||||
if (i2c_m_rd(idev->msg) && idev->msg_xfrd < idev->msg->len)
|
||||
axxia_i2c_empty_rx_fifo(idev);
|
||||
complete(&idev->msg_complete);
|
||||
} else if (status & MST_STATUS_TSS) {
|
||||
/* Transfer timeout */
|
||||
idev->msg_err = -ETIMEDOUT;
|
||||
i2c_int_disable(idev, ~MST_STATUS_TSS);
|
||||
complete(&idev->msg_complete);
|
||||
}
|
||||
|
||||
out:
|
||||
|
||||
@ -836,6 +836,7 @@ static const struct of_device_id sh_mobile_i2c_dt_ids[] = {
|
||||
{ .compatible = "renesas,rcar-gen2-iic", .data = &fast_clock_dt_config },
|
||||
{ .compatible = "renesas,iic-r8a7795", .data = &fast_clock_dt_config },
|
||||
{ .compatible = "renesas,rcar-gen3-iic", .data = &fast_clock_dt_config },
|
||||
{ .compatible = "renesas,iic-r8a77990", .data = &fast_clock_dt_config },
|
||||
{ .compatible = "renesas,iic-sh73a0", .data = &fast_clock_dt_config },
|
||||
{ .compatible = "renesas,rmobile-iic", .data = &default_dt_config },
|
||||
{},
|
||||
|
||||
@ -1393,6 +1393,7 @@ static const struct acpi_device_id kx_acpi_match[] = {
|
||||
{"KXCJ1008", KXCJ91008},
|
||||
{"KXCJ9000", KXCJ91008},
|
||||
{"KIOX000A", KXCJ91008},
|
||||
{"KIOX010A", KXCJ91008}, /* KXCJ91008 inside the display of a 2-in-1 */
|
||||
{"KXTJ1009", KXTJ21009},
|
||||
{"SMO8500", KXCJ91008},
|
||||
{ },
|
||||
|
||||
@ -583,8 +583,11 @@ static int meson_sar_adc_clk_init(struct iio_dev *indio_dev,
|
||||
struct clk_init_data init;
|
||||
const char *clk_parents[1];
|
||||
|
||||
init.name = devm_kasprintf(&indio_dev->dev, GFP_KERNEL, "%pOF#adc_div",
|
||||
indio_dev->dev.of_node);
|
||||
init.name = devm_kasprintf(&indio_dev->dev, GFP_KERNEL, "%s#adc_div",
|
||||
dev_name(indio_dev->dev.parent));
|
||||
if (!init.name)
|
||||
return -ENOMEM;
|
||||
|
||||
init.flags = 0;
|
||||
init.ops = &clk_divider_ops;
|
||||
clk_parents[0] = __clk_get_name(priv->clkin);
|
||||
@ -602,8 +605,11 @@ static int meson_sar_adc_clk_init(struct iio_dev *indio_dev,
|
||||
if (WARN_ON(IS_ERR(priv->adc_div_clk)))
|
||||
return PTR_ERR(priv->adc_div_clk);
|
||||
|
||||
init.name = devm_kasprintf(&indio_dev->dev, GFP_KERNEL, "%pOF#adc_en",
|
||||
indio_dev->dev.of_node);
|
||||
init.name = devm_kasprintf(&indio_dev->dev, GFP_KERNEL, "%s#adc_en",
|
||||
dev_name(indio_dev->dev.parent));
|
||||
if (!init.name)
|
||||
return -ENOMEM;
|
||||
|
||||
init.flags = CLK_SET_RATE_PARENT;
|
||||
init.ops = &clk_gate_ops;
|
||||
clk_parents[0] = __clk_get_name(priv->adc_div_clk);
|
||||
|
||||
@ -1162,6 +1162,7 @@ void hfi1_rc_send_complete(struct rvt_qp *qp, struct hfi1_opa_header *opah)
|
||||
if (cmp_psn(wqe->lpsn, qp->s_sending_psn) >= 0 &&
|
||||
cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)
|
||||
break;
|
||||
rvt_qp_wqe_unreserve(qp, wqe);
|
||||
s_last = qp->s_last;
|
||||
trace_hfi1_qp_send_completion(qp, wqe, s_last);
|
||||
if (++s_last >= qp->s_size)
|
||||
@ -1214,6 +1215,7 @@ static struct rvt_swqe *do_rc_completion(struct rvt_qp *qp,
|
||||
u32 s_last;
|
||||
|
||||
rvt_put_swqe(wqe);
|
||||
rvt_qp_wqe_unreserve(qp, wqe);
|
||||
s_last = qp->s_last;
|
||||
trace_hfi1_qp_send_completion(qp, wqe, s_last);
|
||||
if (++s_last >= qp->s_size)
|
||||
|
||||
@ -440,6 +440,8 @@ send:
|
||||
goto op_err;
|
||||
if (!ret)
|
||||
goto rnr_nak;
|
||||
if (wqe->length > qp->r_len)
|
||||
goto inv_err;
|
||||
break;
|
||||
|
||||
case IB_WR_RDMA_WRITE_WITH_IMM:
|
||||
@ -607,7 +609,10 @@ op_err:
|
||||
goto err;
|
||||
|
||||
inv_err:
|
||||
send_status = IB_WC_REM_INV_REQ_ERR;
|
||||
send_status =
|
||||
sqp->ibqp.qp_type == IB_QPT_RC ?
|
||||
IB_WC_REM_INV_REQ_ERR :
|
||||
IB_WC_SUCCESS;
|
||||
wc.status = IB_WC_LOC_QP_OP_ERR;
|
||||
goto err;
|
||||
|
||||
|
||||
@ -425,6 +425,8 @@ again:
|
||||
goto op_err;
|
||||
if (!ret)
|
||||
goto rnr_nak;
|
||||
if (wqe->length > qp->r_len)
|
||||
goto inv_err;
|
||||
break;
|
||||
|
||||
case IB_WR_RDMA_WRITE_WITH_IMM:
|
||||
@ -585,7 +587,10 @@ op_err:
|
||||
goto err;
|
||||
|
||||
inv_err:
|
||||
send_status = IB_WC_REM_INV_REQ_ERR;
|
||||
send_status =
|
||||
sqp->ibqp.qp_type == IB_QPT_RC ?
|
||||
IB_WC_REM_INV_REQ_ERR :
|
||||
IB_WC_SUCCESS;
|
||||
wc.status = IB_WC_LOC_QP_OP_ERR;
|
||||
goto err;
|
||||
|
||||
|
||||
@ -442,7 +442,14 @@ static int iommu_init_device(struct device *dev)
|
||||
|
||||
dev_data->alias = get_alias(dev);
|
||||
|
||||
if (dev_is_pci(dev) && pci_iommuv2_capable(to_pci_dev(dev))) {
|
||||
/*
|
||||
* By default we use passthrough mode for IOMMUv2 capable device.
|
||||
* But if amd_iommu=force_isolation is set (e.g. to debug DMA to
|
||||
* invalid address), we ignore the capability for the device so
|
||||
* it'll be forced to go into translation mode.
|
||||
*/
|
||||
if ((iommu_pass_through || !amd_iommu_force_isolation) &&
|
||||
dev_is_pci(dev) && pci_iommuv2_capable(to_pci_dev(dev))) {
|
||||
struct amd_iommu *iommu;
|
||||
|
||||
iommu = amd_iommu_rlookup_table[dev_data->devid];
|
||||
|
||||
@ -730,7 +730,13 @@ static void queue_inc_cons(struct arm_smmu_queue *q)
|
||||
u32 cons = (Q_WRP(q, q->cons) | Q_IDX(q, q->cons)) + 1;
|
||||
|
||||
q->cons = Q_OVF(q, q->cons) | Q_WRP(q, cons) | Q_IDX(q, cons);
|
||||
writel(q->cons, q->cons_reg);
|
||||
|
||||
/*
|
||||
* Ensure that all CPU accesses (reads and writes) to the queue
|
||||
* are complete before we update the cons pointer.
|
||||
*/
|
||||
mb();
|
||||
writel_relaxed(q->cons, q->cons_reg);
|
||||
}
|
||||
|
||||
static int queue_sync_prod(struct arm_smmu_queue *q)
|
||||
|
||||
@ -117,6 +117,7 @@ enum arm_smmu_implementation {
|
||||
GENERIC_SMMU,
|
||||
ARM_MMU500,
|
||||
CAVIUM_SMMUV2,
|
||||
QCOM_SMMUV2,
|
||||
};
|
||||
|
||||
/* Until ACPICA headers cover IORT rev. C */
|
||||
@ -1910,6 +1911,7 @@ ARM_SMMU_MATCH_DATA(smmu_generic_v2, ARM_SMMU_V2, GENERIC_SMMU);
|
||||
ARM_SMMU_MATCH_DATA(arm_mmu401, ARM_SMMU_V1_64K, GENERIC_SMMU);
|
||||
ARM_SMMU_MATCH_DATA(arm_mmu500, ARM_SMMU_V2, ARM_MMU500);
|
||||
ARM_SMMU_MATCH_DATA(cavium_smmuv2, ARM_SMMU_V2, CAVIUM_SMMUV2);
|
||||
ARM_SMMU_MATCH_DATA(qcom_smmuv2, ARM_SMMU_V2, QCOM_SMMUV2);
|
||||
|
||||
static const struct of_device_id arm_smmu_of_match[] = {
|
||||
{ .compatible = "arm,smmu-v1", .data = &smmu_generic_v1 },
|
||||
@ -1918,6 +1920,7 @@ static const struct of_device_id arm_smmu_of_match[] = {
|
||||
{ .compatible = "arm,mmu-401", .data = &arm_mmu401 },
|
||||
{ .compatible = "arm,mmu-500", .data = &arm_mmu500 },
|
||||
{ .compatible = "cavium,smmu-v2", .data = &cavium_smmuv2 },
|
||||
{ .compatible = "qcom,smmu-v2", .data = &qcom_smmuv2 },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, arm_smmu_of_match);
|
||||
|
||||
@ -87,9 +87,14 @@ struct its_baser {
|
||||
* The ITS structure - contains most of the infrastructure, with the
|
||||
* top-level MSI domain, the command queue, the collections, and the
|
||||
* list of devices writing to it.
|
||||
*
|
||||
* dev_alloc_lock has to be taken for device allocations, while the
|
||||
* spinlock must be taken to parse data structures such as the device
|
||||
* list.
|
||||
*/
|
||||
struct its_node {
|
||||
raw_spinlock_t lock;
|
||||
struct mutex dev_alloc_lock;
|
||||
struct list_head entry;
|
||||
void __iomem *base;
|
||||
phys_addr_t phys_base;
|
||||
@ -138,6 +143,7 @@ struct its_device {
|
||||
void *itt;
|
||||
u32 nr_ites;
|
||||
u32 device_id;
|
||||
bool shared;
|
||||
};
|
||||
|
||||
static struct {
|
||||
@ -2109,6 +2115,7 @@ static int its_msi_prepare(struct irq_domain *domain, struct device *dev,
|
||||
struct its_device *its_dev;
|
||||
struct msi_domain_info *msi_info;
|
||||
u32 dev_id;
|
||||
int err = 0;
|
||||
|
||||
/*
|
||||
* We ignore "dev" entierely, and rely on the dev_id that has
|
||||
@ -2131,6 +2138,7 @@ static int its_msi_prepare(struct irq_domain *domain, struct device *dev,
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
mutex_lock(&its->dev_alloc_lock);
|
||||
its_dev = its_find_device(its, dev_id);
|
||||
if (its_dev) {
|
||||
/*
|
||||
@ -2138,18 +2146,22 @@ static int its_msi_prepare(struct irq_domain *domain, struct device *dev,
|
||||
* another alias (PCI bridge of some sort). No need to
|
||||
* create the device.
|
||||
*/
|
||||
its_dev->shared = true;
|
||||
pr_debug("Reusing ITT for devID %x\n", dev_id);
|
||||
goto out;
|
||||
}
|
||||
|
||||
its_dev = its_create_device(its, dev_id, nvec, true);
|
||||
if (!its_dev)
|
||||
return -ENOMEM;
|
||||
if (!its_dev) {
|
||||
err = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
|
||||
pr_debug("ITT %d entries, %d bits\n", nvec, ilog2(nvec));
|
||||
out:
|
||||
mutex_unlock(&its->dev_alloc_lock);
|
||||
info->scratchpad[0].ptr = its_dev;
|
||||
return 0;
|
||||
return err;
|
||||
}
|
||||
|
||||
static struct msi_domain_ops its_msi_domain_ops = {
|
||||
@ -2252,6 +2264,7 @@ static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq,
|
||||
{
|
||||
struct irq_data *d = irq_domain_get_irq_data(domain, virq);
|
||||
struct its_device *its_dev = irq_data_get_irq_chip_data(d);
|
||||
struct its_node *its = its_dev->its;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < nr_irqs; i++) {
|
||||
@ -2266,8 +2279,14 @@ static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq,
|
||||
irq_domain_reset_irq_data(data);
|
||||
}
|
||||
|
||||
/* If all interrupts have been freed, start mopping the floor */
|
||||
if (bitmap_empty(its_dev->event_map.lpi_map,
|
||||
mutex_lock(&its->dev_alloc_lock);
|
||||
|
||||
/*
|
||||
* If all interrupts have been freed, start mopping the
|
||||
* floor. This is conditionned on the device not being shared.
|
||||
*/
|
||||
if (!its_dev->shared &&
|
||||
bitmap_empty(its_dev->event_map.lpi_map,
|
||||
its_dev->event_map.nr_lpis)) {
|
||||
its_lpi_free_chunks(its_dev->event_map.lpi_map,
|
||||
its_dev->event_map.lpi_base,
|
||||
@ -2279,6 +2298,8 @@ static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq,
|
||||
its_free_device(its_dev);
|
||||
}
|
||||
|
||||
mutex_unlock(&its->dev_alloc_lock);
|
||||
|
||||
irq_domain_free_irqs_parent(domain, virq, nr_irqs);
|
||||
}
|
||||
|
||||
@ -2966,6 +2987,7 @@ static int __init its_probe_one(struct resource *res,
|
||||
}
|
||||
|
||||
raw_spin_lock_init(&its->lock);
|
||||
mutex_init(&its->dev_alloc_lock);
|
||||
INIT_LIST_HEAD(&its->entry);
|
||||
INIT_LIST_HEAD(&its->its_device_list);
|
||||
typer = gic_read_typer(its_base + GITS_TYPER);
|
||||
|
||||
@ -1169,11 +1169,13 @@ HFCPCI_l1hw(struct PStack *st, int pr, void *arg)
|
||||
if (cs->debug & L1_DEB_LAPD)
|
||||
debugl1(cs, "-> PH_REQUEST_PULL");
|
||||
#endif
|
||||
spin_lock_irqsave(&cs->lock, flags);
|
||||
if (!cs->tx_skb) {
|
||||
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
|
||||
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
|
||||
} else
|
||||
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
|
||||
spin_unlock_irqrestore(&cs->lock, flags);
|
||||
break;
|
||||
case (HW_RESET | REQUEST):
|
||||
spin_lock_irqsave(&cs->lock, flags);
|
||||
|
||||
@ -1190,7 +1190,9 @@ static void raid10_read_request(struct mddev *mddev, struct bio *bio,
|
||||
struct bio *split = bio_split(bio, max_sectors,
|
||||
gfp, conf->bio_split);
|
||||
bio_chain(split, bio);
|
||||
allow_barrier(conf);
|
||||
generic_make_request(bio);
|
||||
wait_barrier(conf);
|
||||
bio = split;
|
||||
r10_bio->master_bio = bio;
|
||||
r10_bio->sectors = max_sectors;
|
||||
@ -1479,7 +1481,9 @@ retry_write:
|
||||
struct bio *split = bio_split(bio, r10_bio->sectors,
|
||||
GFP_NOIO, conf->bio_split);
|
||||
bio_chain(split, bio);
|
||||
allow_barrier(conf);
|
||||
generic_make_request(bio);
|
||||
wait_barrier(conf);
|
||||
bio = split;
|
||||
r10_bio->master_bio = bio;
|
||||
}
|
||||
|
||||
@ -590,7 +590,7 @@ static const struct v4l2_dv_timings_cap ad9389b_timings_cap = {
|
||||
.type = V4L2_DV_BT_656_1120,
|
||||
/* keep this initialization for compatibility with GCC < 4.4.6 */
|
||||
.reserved = { 0 },
|
||||
V4L2_INIT_BT_TIMINGS(0, 1920, 0, 1200, 25000000, 170000000,
|
||||
V4L2_INIT_BT_TIMINGS(640, 1920, 350, 1200, 25000000, 170000000,
|
||||
V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
|
||||
V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
|
||||
V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
|
||||
|
||||
@ -142,7 +142,7 @@ static const struct v4l2_dv_timings_cap adv7511_timings_cap = {
|
||||
.type = V4L2_DV_BT_656_1120,
|
||||
/* keep this initialization for compatibility with GCC < 4.4.6 */
|
||||
.reserved = { 0 },
|
||||
V4L2_INIT_BT_TIMINGS(0, ADV7511_MAX_WIDTH, 0, ADV7511_MAX_HEIGHT,
|
||||
V4L2_INIT_BT_TIMINGS(640, ADV7511_MAX_WIDTH, 350, ADV7511_MAX_HEIGHT,
|
||||
ADV7511_MIN_PIXELCLOCK, ADV7511_MAX_PIXELCLOCK,
|
||||
V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
|
||||
V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
|
||||
|
||||
@ -778,7 +778,7 @@ static const struct v4l2_dv_timings_cap adv7604_timings_cap_analog = {
|
||||
.type = V4L2_DV_BT_656_1120,
|
||||
/* keep this initialization for compatibility with GCC < 4.4.6 */
|
||||
.reserved = { 0 },
|
||||
V4L2_INIT_BT_TIMINGS(0, 1920, 0, 1200, 25000000, 170000000,
|
||||
V4L2_INIT_BT_TIMINGS(640, 1920, 350, 1200, 25000000, 170000000,
|
||||
V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
|
||||
V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
|
||||
V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
|
||||
@ -789,7 +789,7 @@ static const struct v4l2_dv_timings_cap adv76xx_timings_cap_digital = {
|
||||
.type = V4L2_DV_BT_656_1120,
|
||||
/* keep this initialization for compatibility with GCC < 4.4.6 */
|
||||
.reserved = { 0 },
|
||||
V4L2_INIT_BT_TIMINGS(0, 1920, 0, 1200, 25000000, 225000000,
|
||||
V4L2_INIT_BT_TIMINGS(640, 1920, 350, 1200, 25000000, 225000000,
|
||||
V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
|
||||
V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
|
||||
V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
|
||||
|
||||
@ -676,7 +676,7 @@ static const struct v4l2_dv_timings_cap adv7842_timings_cap_analog = {
|
||||
.type = V4L2_DV_BT_656_1120,
|
||||
/* keep this initialization for compatibility with GCC < 4.4.6 */
|
||||
.reserved = { 0 },
|
||||
V4L2_INIT_BT_TIMINGS(0, 1920, 0, 1200, 25000000, 170000000,
|
||||
V4L2_INIT_BT_TIMINGS(640, 1920, 350, 1200, 25000000, 170000000,
|
||||
V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
|
||||
V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
|
||||
V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
|
||||
@ -687,7 +687,7 @@ static const struct v4l2_dv_timings_cap adv7842_timings_cap_digital = {
|
||||
.type = V4L2_DV_BT_656_1120,
|
||||
/* keep this initialization for compatibility with GCC < 4.4.6 */
|
||||
.reserved = { 0 },
|
||||
V4L2_INIT_BT_TIMINGS(0, 1920, 0, 1200, 25000000, 225000000,
|
||||
V4L2_INIT_BT_TIMINGS(640, 1920, 350, 1200, 25000000, 225000000,
|
||||
V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
|
||||
V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
|
||||
V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
|
||||
|
||||
@ -70,7 +70,7 @@ static const struct v4l2_dv_timings_cap tc358743_timings_cap = {
|
||||
/* keep this initialization for compatibility with GCC < 4.4.6 */
|
||||
.reserved = { 0 },
|
||||
/* Pixel clock from REF_01 p. 20. Min/max height/width are unknown */
|
||||
V4L2_INIT_BT_TIMINGS(1, 10000, 1, 10000, 0, 165000000,
|
||||
V4L2_INIT_BT_TIMINGS(640, 1920, 350, 1200, 13000000, 165000000,
|
||||
V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
|
||||
V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
|
||||
V4L2_DV_BT_CAP_PROGRESSIVE |
|
||||
|
||||
@ -49,7 +49,7 @@ static const struct v4l2_dv_timings_cap ths8200_timings_cap = {
|
||||
.type = V4L2_DV_BT_656_1120,
|
||||
/* keep this initialization for compatibility with GCC < 4.4.6 */
|
||||
.reserved = { 0 },
|
||||
V4L2_INIT_BT_TIMINGS(0, 1920, 0, 1080, 25000000, 148500000,
|
||||
V4L2_INIT_BT_TIMINGS(640, 1920, 350, 1080, 25000000, 148500000,
|
||||
V4L2_DV_BT_STD_CEA861, V4L2_DV_BT_CAP_PROGRESSIVE)
|
||||
};
|
||||
|
||||
|
||||
@ -953,16 +953,15 @@ static int coda_start_encoding(struct coda_ctx *ctx)
|
||||
else
|
||||
coda_write(dev, CODA_STD_H264,
|
||||
CODA_CMD_ENC_SEQ_COD_STD);
|
||||
if (ctx->params.h264_deblk_enabled) {
|
||||
value = ((ctx->params.h264_deblk_alpha &
|
||||
CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK) <<
|
||||
CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) |
|
||||
((ctx->params.h264_deblk_beta &
|
||||
CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) <<
|
||||
CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET);
|
||||
} else {
|
||||
value = 1 << CODA_264PARAM_DISABLEDEBLK_OFFSET;
|
||||
}
|
||||
value = ((ctx->params.h264_disable_deblocking_filter_idc &
|
||||
CODA_264PARAM_DISABLEDEBLK_MASK) <<
|
||||
CODA_264PARAM_DISABLEDEBLK_OFFSET) |
|
||||
((ctx->params.h264_slice_alpha_c0_offset_div2 &
|
||||
CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK) <<
|
||||
CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) |
|
||||
((ctx->params.h264_slice_beta_offset_div2 &
|
||||
CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) <<
|
||||
CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET);
|
||||
coda_write(dev, value, CODA_CMD_ENC_SEQ_264_PARA);
|
||||
break;
|
||||
case V4L2_PIX_FMT_JPEG:
|
||||
|
||||
@ -1675,14 +1675,13 @@ static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
|
||||
ctx->params.h264_max_qp = ctrl->val;
|
||||
break;
|
||||
case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA:
|
||||
ctx->params.h264_deblk_alpha = ctrl->val;
|
||||
ctx->params.h264_slice_alpha_c0_offset_div2 = ctrl->val;
|
||||
break;
|
||||
case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA:
|
||||
ctx->params.h264_deblk_beta = ctrl->val;
|
||||
ctx->params.h264_slice_beta_offset_div2 = ctrl->val;
|
||||
break;
|
||||
case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE:
|
||||
ctx->params.h264_deblk_enabled = (ctrl->val ==
|
||||
V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED);
|
||||
ctx->params.h264_disable_deblocking_filter_idc = ctrl->val;
|
||||
break;
|
||||
case V4L2_CID_MPEG_VIDEO_H264_PROFILE:
|
||||
/* TODO: switch between baseline and constrained baseline */
|
||||
@ -1764,13 +1763,13 @@ static void coda_encode_ctrls(struct coda_ctx *ctx)
|
||||
v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
|
||||
V4L2_CID_MPEG_VIDEO_H264_MAX_QP, 0, 51, 1, 51);
|
||||
v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
|
||||
V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA, 0, 15, 1, 0);
|
||||
V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA, -6, 6, 1, 0);
|
||||
v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
|
||||
V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA, 0, 15, 1, 0);
|
||||
V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA, -6, 6, 1, 0);
|
||||
v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
|
||||
V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE,
|
||||
V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED, 0x0,
|
||||
V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED);
|
||||
V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY,
|
||||
0x0, V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED);
|
||||
v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
|
||||
V4L2_CID_MPEG_VIDEO_H264_PROFILE,
|
||||
V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, 0x0,
|
||||
|
||||
@ -114,9 +114,9 @@ struct coda_params {
|
||||
u8 h264_inter_qp;
|
||||
u8 h264_min_qp;
|
||||
u8 h264_max_qp;
|
||||
u8 h264_deblk_enabled;
|
||||
u8 h264_deblk_alpha;
|
||||
u8 h264_deblk_beta;
|
||||
u8 h264_disable_deblocking_filter_idc;
|
||||
s8 h264_slice_alpha_c0_offset_div2;
|
||||
s8 h264_slice_beta_offset_div2;
|
||||
u8 h264_profile_idc;
|
||||
u8 h264_level_idc;
|
||||
u8 mpeg4_intra_qp;
|
||||
|
||||
@ -292,7 +292,7 @@
|
||||
#define CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET 8
|
||||
#define CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK 0x0f
|
||||
#define CODA_264PARAM_DISABLEDEBLK_OFFSET 6
|
||||
#define CODA_264PARAM_DISABLEDEBLK_MASK 0x01
|
||||
#define CODA_264PARAM_DISABLEDEBLK_MASK 0x03
|
||||
#define CODA_264PARAM_CONSTRAINEDINTRAPREDFLAG_OFFSET 5
|
||||
#define CODA_264PARAM_CONSTRAINEDINTRAPREDFLAG_MASK 0x01
|
||||
#define CODA_264PARAM_CHROMAQPOFFSET_OFFSET 0
|
||||
|
||||
@ -739,7 +739,7 @@ static int vpbe_initialize(struct device *dev, struct vpbe_device *vpbe_dev)
|
||||
if (ret) {
|
||||
v4l2_err(&vpbe_dev->v4l2_dev, "Failed to set default output %s",
|
||||
def_output);
|
||||
return ret;
|
||||
goto fail_kfree_amp;
|
||||
}
|
||||
|
||||
printk(KERN_NOTICE "Setting default mode to %s\n", def_mode);
|
||||
@ -747,12 +747,15 @@ static int vpbe_initialize(struct device *dev, struct vpbe_device *vpbe_dev)
|
||||
if (ret) {
|
||||
v4l2_err(&vpbe_dev->v4l2_dev, "Failed to set default mode %s",
|
||||
def_mode);
|
||||
return ret;
|
||||
goto fail_kfree_amp;
|
||||
}
|
||||
vpbe_dev->initialized = 1;
|
||||
/* TBD handling of bootargs for default output and mode */
|
||||
return 0;
|
||||
|
||||
fail_kfree_amp:
|
||||
mutex_lock(&vpbe_dev->lock);
|
||||
kfree(vpbe_dev->amp);
|
||||
fail_kfree_encoders:
|
||||
kfree(vpbe_dev->encoders);
|
||||
fail_dev_unregister:
|
||||
|
||||
@ -41,25 +41,27 @@ int mtk_vcodec_init_enc_pm(struct mtk_vcodec_dev *mtkdev)
|
||||
node = of_parse_phandle(dev->of_node, "mediatek,larb", 0);
|
||||
if (!node) {
|
||||
mtk_v4l2_err("no mediatek,larb found");
|
||||
return -1;
|
||||
return -ENODEV;
|
||||
}
|
||||
pdev = of_find_device_by_node(node);
|
||||
of_node_put(node);
|
||||
if (!pdev) {
|
||||
mtk_v4l2_err("no mediatek,larb device found");
|
||||
return -1;
|
||||
return -ENODEV;
|
||||
}
|
||||
pm->larbvenc = &pdev->dev;
|
||||
|
||||
node = of_parse_phandle(dev->of_node, "mediatek,larb", 1);
|
||||
if (!node) {
|
||||
mtk_v4l2_err("no mediatek,larb found");
|
||||
return -1;
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
pdev = of_find_device_by_node(node);
|
||||
of_node_put(node);
|
||||
if (!pdev) {
|
||||
mtk_v4l2_err("no mediatek,larb device found");
|
||||
return -1;
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
pm->larbvenclt = &pdev->dev;
|
||||
|
||||
@ -18,6 +18,7 @@
|
||||
#include <linux/delay.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
|
||||
#define DRIVER_NAME "memstick"
|
||||
|
||||
@ -436,6 +437,7 @@ static void memstick_check(struct work_struct *work)
|
||||
struct memstick_dev *card;
|
||||
|
||||
dev_dbg(&host->dev, "memstick_check started\n");
|
||||
pm_runtime_get_noresume(host->dev.parent);
|
||||
mutex_lock(&host->lock);
|
||||
if (!host->card) {
|
||||
if (memstick_power_on(host))
|
||||
@ -479,6 +481,7 @@ out_power_off:
|
||||
host->set_param(host, MEMSTICK_POWER, MEMSTICK_POWER_OFF);
|
||||
|
||||
mutex_unlock(&host->lock);
|
||||
pm_runtime_put(host->dev.parent);
|
||||
dev_dbg(&host->dev, "memstick_check finished\n");
|
||||
}
|
||||
|
||||
|
||||
@ -286,6 +286,7 @@ static void bcm2835_reset(struct mmc_host *mmc)
|
||||
|
||||
if (host->dma_chan)
|
||||
dmaengine_terminate_sync(host->dma_chan);
|
||||
host->dma_chan = NULL;
|
||||
bcm2835_reset_internal(host);
|
||||
}
|
||||
|
||||
@ -772,6 +773,8 @@ static void bcm2835_finish_command(struct bcm2835_host *host)
|
||||
|
||||
if (!(sdhsts & SDHSTS_CRC7_ERROR) ||
|
||||
(host->cmd->opcode != MMC_SEND_OP_COND)) {
|
||||
u32 edm, fsm;
|
||||
|
||||
if (sdhsts & SDHSTS_CMD_TIME_OUT) {
|
||||
host->cmd->error = -ETIMEDOUT;
|
||||
} else {
|
||||
@ -780,6 +783,13 @@ static void bcm2835_finish_command(struct bcm2835_host *host)
|
||||
bcm2835_dumpregs(host);
|
||||
host->cmd->error = -EILSEQ;
|
||||
}
|
||||
edm = readl(host->ioaddr + SDEDM);
|
||||
fsm = edm & SDEDM_FSM_MASK;
|
||||
if (fsm == SDEDM_FSM_READWAIT ||
|
||||
fsm == SDEDM_FSM_WRITESTART1)
|
||||
/* Kick the FSM out of its wait */
|
||||
writel(edm | SDEDM_FORCE_DATA_MODE,
|
||||
host->ioaddr + SDEDM);
|
||||
bcm2835_finish_request(host);
|
||||
return;
|
||||
}
|
||||
@ -837,6 +847,8 @@ static void bcm2835_timeout(struct work_struct *work)
|
||||
dev_err(dev, "timeout waiting for hardware interrupt.\n");
|
||||
bcm2835_dumpregs(host);
|
||||
|
||||
bcm2835_reset(host->mmc);
|
||||
|
||||
if (host->data) {
|
||||
host->data->error = -ETIMEDOUT;
|
||||
bcm2835_finish_data(host);
|
||||
|
||||
@ -481,8 +481,12 @@ static void esdhc_clock_enable(struct sdhci_host *host, bool enable)
|
||||
/* Wait max 20 ms */
|
||||
timeout = ktime_add_ms(ktime_get(), 20);
|
||||
val = ESDHC_CLOCK_STABLE;
|
||||
while (!(sdhci_readl(host, ESDHC_PRSSTAT) & val)) {
|
||||
if (ktime_after(ktime_get(), timeout)) {
|
||||
while (1) {
|
||||
bool timedout = ktime_after(ktime_get(), timeout);
|
||||
|
||||
if (sdhci_readl(host, ESDHC_PRSSTAT) & val)
|
||||
break;
|
||||
if (timedout) {
|
||||
pr_err("%s: Internal clock never stabilised.\n",
|
||||
mmc_hostname(host->mmc));
|
||||
break;
|
||||
@ -558,8 +562,12 @@ static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock)
|
||||
|
||||
/* Wait max 20 ms */
|
||||
timeout = ktime_add_ms(ktime_get(), 20);
|
||||
while (!(sdhci_readl(host, ESDHC_PRSSTAT) & ESDHC_CLOCK_STABLE)) {
|
||||
if (ktime_after(ktime_get(), timeout)) {
|
||||
while (1) {
|
||||
bool timedout = ktime_after(ktime_get(), timeout);
|
||||
|
||||
if (sdhci_readl(host, ESDHC_PRSSTAT) & ESDHC_CLOCK_STABLE)
|
||||
break;
|
||||
if (timedout) {
|
||||
pr_err("%s: Internal clock never stabilised.\n",
|
||||
mmc_hostname(host->mmc));
|
||||
return;
|
||||
|
||||
@ -357,9 +357,13 @@ static int xenon_emmc_phy_enable_dll(struct sdhci_host *host)
|
||||
|
||||
/* Wait max 32 ms */
|
||||
timeout = ktime_add_ms(ktime_get(), 32);
|
||||
while (!(sdhci_readw(host, XENON_SLOT_EXT_PRESENT_STATE) &
|
||||
XENON_DLL_LOCK_STATE)) {
|
||||
if (ktime_after(ktime_get(), timeout)) {
|
||||
while (1) {
|
||||
bool timedout = ktime_after(ktime_get(), timeout);
|
||||
|
||||
if (sdhci_readw(host, XENON_SLOT_EXT_PRESENT_STATE) &
|
||||
XENON_DLL_LOCK_STATE)
|
||||
break;
|
||||
if (timedout) {
|
||||
dev_err(mmc_dev(host->mmc), "Wait for DLL Lock time-out\n");
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
@ -34,9 +34,13 @@ static int xenon_enable_internal_clk(struct sdhci_host *host)
|
||||
sdhci_writel(host, reg, SDHCI_CLOCK_CONTROL);
|
||||
/* Wait max 20 ms */
|
||||
timeout = ktime_add_ms(ktime_get(), 20);
|
||||
while (!((reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
|
||||
& SDHCI_CLOCK_INT_STABLE)) {
|
||||
if (ktime_after(ktime_get(), timeout)) {
|
||||
while (1) {
|
||||
bool timedout = ktime_after(ktime_get(), timeout);
|
||||
|
||||
reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
|
||||
if (reg & SDHCI_CLOCK_INT_STABLE)
|
||||
break;
|
||||
if (timedout) {
|
||||
dev_err(mmc_dev(host->mmc), "Internal clock never stabilised.\n");
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
@ -519,7 +519,6 @@ static void bcm_sysport_get_wol(struct net_device *dev,
|
||||
struct ethtool_wolinfo *wol)
|
||||
{
|
||||
struct bcm_sysport_priv *priv = netdev_priv(dev);
|
||||
u32 reg;
|
||||
|
||||
wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
|
||||
wol->wolopts = priv->wolopts;
|
||||
@ -527,11 +526,7 @@ static void bcm_sysport_get_wol(struct net_device *dev,
|
||||
if (!(priv->wolopts & WAKE_MAGICSECURE))
|
||||
return;
|
||||
|
||||
/* Return the programmed SecureOn password */
|
||||
reg = umac_readl(priv, UMAC_PSW_MS);
|
||||
put_unaligned_be16(reg, &wol->sopass[0]);
|
||||
reg = umac_readl(priv, UMAC_PSW_LS);
|
||||
put_unaligned_be32(reg, &wol->sopass[2]);
|
||||
memcpy(wol->sopass, priv->sopass, sizeof(priv->sopass));
|
||||
}
|
||||
|
||||
static int bcm_sysport_set_wol(struct net_device *dev,
|
||||
@ -547,13 +542,8 @@ static int bcm_sysport_set_wol(struct net_device *dev,
|
||||
if (wol->wolopts & ~supported)
|
||||
return -EINVAL;
|
||||
|
||||
/* Program the SecureOn password */
|
||||
if (wol->wolopts & WAKE_MAGICSECURE) {
|
||||
umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
|
||||
UMAC_PSW_MS);
|
||||
umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
|
||||
UMAC_PSW_LS);
|
||||
}
|
||||
if (wol->wolopts & WAKE_MAGICSECURE)
|
||||
memcpy(priv->sopass, wol->sopass, sizeof(priv->sopass));
|
||||
|
||||
/* Flag the device and relevant IRQ as wakeup capable */
|
||||
if (wol->wolopts) {
|
||||
@ -2221,12 +2211,17 @@ static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
|
||||
unsigned int timeout = 1000;
|
||||
u32 reg;
|
||||
|
||||
/* Password has already been programmed */
|
||||
reg = umac_readl(priv, UMAC_MPD_CTRL);
|
||||
reg |= MPD_EN;
|
||||
reg &= ~PSW_EN;
|
||||
if (priv->wolopts & WAKE_MAGICSECURE)
|
||||
if (priv->wolopts & WAKE_MAGICSECURE) {
|
||||
/* Program the SecureOn password */
|
||||
umac_writel(priv, get_unaligned_be16(&priv->sopass[0]),
|
||||
UMAC_PSW_MS);
|
||||
umac_writel(priv, get_unaligned_be32(&priv->sopass[2]),
|
||||
UMAC_PSW_LS);
|
||||
reg |= PSW_EN;
|
||||
}
|
||||
umac_writel(priv, reg, UMAC_MPD_CTRL);
|
||||
|
||||
/* Make sure RBUF entered WoL mode as result */
|
||||
|
||||
@ -11,6 +11,7 @@
|
||||
#ifndef __BCM_SYSPORT_H
|
||||
#define __BCM_SYSPORT_H
|
||||
|
||||
#include <linux/ethtool.h>
|
||||
#include <linux/if_vlan.h>
|
||||
|
||||
/* Receive/transmit descriptor format */
|
||||
@ -754,6 +755,7 @@ struct bcm_sysport_priv {
|
||||
unsigned int crc_fwd:1;
|
||||
u16 rev;
|
||||
u32 wolopts;
|
||||
u8 sopass[SOPASS_MAX];
|
||||
unsigned int wol_irq_disabled:1;
|
||||
|
||||
/* MIB related fields */
|
||||
|
||||
@ -1393,7 +1393,8 @@ static void enic_rq_indicate_buf(struct vnic_rq *rq,
|
||||
* csum is correct or is zero.
|
||||
*/
|
||||
if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc &&
|
||||
tcp_udp_csum_ok && ipv4_csum_ok && outer_csum_ok) {
|
||||
tcp_udp_csum_ok && outer_csum_ok &&
|
||||
(ipv4_csum_ok || ipv6)) {
|
||||
skb->ip_summed = CHECKSUM_UNNECESSARY;
|
||||
skb->csum_level = encap;
|
||||
}
|
||||
|
||||
@ -927,7 +927,7 @@ int memac_add_hash_mac_address(struct fman_mac *memac, enet_addr_t *eth_addr)
|
||||
hash = get_mac_addr_hash_code(addr) & HASH_CTRL_ADDR_MASK;
|
||||
|
||||
/* Create element to be added to the driver hash table */
|
||||
hash_entry = kmalloc(sizeof(*hash_entry), GFP_KERNEL);
|
||||
hash_entry = kmalloc(sizeof(*hash_entry), GFP_ATOMIC);
|
||||
if (!hash_entry)
|
||||
return -ENOMEM;
|
||||
hash_entry->addr = addr;
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
x
Reference in New Issue
Block a user