diff --git a/drivers/irqchip/qcom/pdc-sm8150.c b/drivers/irqchip/qcom/pdc-sm8150.c index fa09c4e13186..8e7a63a3cc61 100644 --- a/drivers/irqchip/qcom/pdc-sm8150.c +++ b/drivers/irqchip/qcom/pdc-sm8150.c @@ -28,13 +28,13 @@ static struct pdc_pin sm8150_data[] = { {10, 522},/*eud_p1_dmse_int_mx*/ {11, 523},/*eud_p1_dpse_int_mx*/ {12, 524},/*eud_int_mx[1]*/ - {13, 525},/*ssc_xpu_irq_summary*/ + {13, 525},/*xpu_irq_summary*/ {14, 526},/*wd_bite_apps*/ - {15, 527},/*ssc_vmidmt_irq_summary*/ + {15, 527},/*vmidmt_irq_summary*/ {16, 528},/*q6ss_irq_out_apps_ipc[4]*/ {17, 529},/*not-connected*/ {18, 530},/*aoss_pmic_arb_mpu_xpu_summary_irq*/ - {19, 531},/*apps_pdc_irq_in_19*/ + {19, 531},/*rpmh_wake_2*/ {20, 532},/*apps_pdc_irq_in_20*/ {21, 533},/*apps_pdc_irq_in_21*/ {22, 534},/*pdc_apps_epcb_timeout_summary_irq*/ @@ -45,102 +45,102 @@ static struct pdc_pin sm8150_data[] = { {27, 539},/*tsense1_upper_lower_intr*/ {28, 540},/*tsense0_critical_intr*/ {29, 541},/*tsense1_critical_intr*/ - {30, 542},/*core_bi_px_gpio_1*/ - {31, 543},/*core_bi_px_gpio_3*/ - {32, 544},/*core_bi_px_gpio_5*/ - {33, 545},/*core_bi_px_gpio_10*/ - {34, 546},/*core_bi_px_gpio_11*/ - {35, 547},/*core_bi_px_gpio_20*/ - {36, 548},/*core_bi_px_gpio_22*/ - {37, 549},/*core_bi_px_gpio_24*/ - {38, 550},/*core_bi_px_gpio_26*/ - {39, 551},/*core_bi_px_gpio_30*/ - {40, 552},/*gp_irq_hv[10]*/ - {41, 553},/*core_bi_px_gpio_32*/ - {42, 554},/*core_bi_px_gpio_34*/ - {43, 555},/*core_bi_px_gpio_36*/ - {44, 556},/*core_bi_px_gpio_37*/ - {45, 557},/*core_bi_px_gpio_38*/ - {46, 558},/*core_bi_px_gpio_39*/ - {47, 559},/*core_bi_px_gpio_40*/ - {48, 560},/*gp_irq_hv[18]*/ - {49, 561},/*core_bi_px_gpio_43*/ - {50, 562},/*core_bi_px_gpio_44*/ - {51, 563},/*core_bi_px_gpio_46*/ - {52, 564},/*core_bi_px_gpio_48*/ - {53, 565},/*gp_irq_hv[23]*/ - {54, 566},/*core_bi_px_gpio_52*/ - {55, 567},/*core_bi_px_gpio_53*/ - {56, 568},/*core_bi_px_gpio_54*/ - {57, 569},/*core_bi_px_gpio_56*/ - {58, 570},/*core_bi_px_gpio_57*/ - {59, 571},/*core_bi_px_gpio_58*/ - {60, 572},/*core_bi_px_gpio_59*/ - {61, 573},/*core_bi_px_gpio_60*/ - {62, 574},/*core_bi_px_gpio_61*/ - {63, 575},/*core_bi_px_gpio_62*/ - {64, 576},/*core_bi_px_gpio_63*/ - {65, 577},/*core_bi_px_gpio_64*/ - {66, 578},/*core_bi_px_gpio_66*/ - {67, 579},/*core_bi_px_gpio_68*/ - {68, 580},/*core_bi_px_gpio_71*/ - {69, 581},/*core_bi_px_gpio_73*/ - {70, 582},/*core_bi_px_gpio_77*/ - {71, 583},/*core_bi_px_gpio_78*/ - {72, 584},/*core_bi_px_gpio_79*/ - {73, 585},/*core_bi_px_gpio_80*/ - {74, 586},/*core_bi_px_gpio_84*/ - {75, 587},/*core_bi_px_gpio_85*/ - {76, 588},/*core_bi_px_gpio_86*/ - {77, 589},/*core_bi_px_gpio_88*/ - {78, 590},/*gp_irq_hv[48]*/ - {79, 591},/*core_bi_px_gpio_91*/ - {80, 592},/*core_bi_px_gpio_92*/ - {81, 593},/*core_bi_px_gpio_95*/ - {82, 594},/*core_bi_px_gpio_96*/ - {83, 595},/*core_bi_px_gpio_97*/ - {84, 596},/*core_bi_px_gpio_101*/ - {85, 597},/*core_bi_px_gpio_103*/ - {86, 598},/*core_bi_px_gpio_104*/ - {87, 599},/*core_bi_px_to_mpm[6]*/ - {88, 600},/*core_bi_px_to_mpm[0]*/ - {89, 601},/*core_bi_px_to_mpm[1]*/ - {90, 602},/*core_bi_px_gpio_115*/ - {91, 603},/*core_bi_px_gpio_116*/ - {92, 604},/*core_bi_px_gpio_117*/ - {93, 605},/*core_bi_px_gpio_118*/ - {94, 641},/*core_bi_px_gpio_119*/ - {95, 642},/*core_bi_px_gpio_120*/ - {96, 643},/*core_bi_px_gpio_121*/ - {97, 644},/*core_bi_px_gpio_122*/ - {98, 645},/*core_bi_px_gpio_123*/ - {99, 646},/*core_bi_px_gpio_124*/ - {100, 647},/*core_bi_px_gpio_125*/ - {101, 648},/*core_bi_px_to_mpm[5]*/ - {102, 649},/*core_bi_px_gpio_127*/ - {103, 650},/*core_bi_px_gpio_128*/ - {104, 651},/*core_bi_px_gpio_129*/ - {105, 652},/*core_bi_px_gpio_130*/ - {106, 653},/*core_bi_px_gpio_132*/ - {107, 654},/*core_bi_px_gpio_133*/ - {108, 655},/*core_bi_px_gpio_145*/ - {109, 656},/*gp_irq_hv[79]*/ - {110, 657},/*gp_irq_hv[80]*/ - {111, 658},/*gp_irq_hv[81]*/ - {112, 659},/*gp_irq_hv[82]*/ - {113, 660},/*gp_irq_hv[83]*/ - {114, 661},/*gp_irq_hv[84]*/ - {115, 662},/*core_bi_px_gpio_41*/ - {116, 663},/*core_bi_px_gpio_89*/ - {117, 664},/*core_bi_px_gpio_31*/ - {118, 665},/*core_bi_px_gpio_49*/ - {119, 666},/*core_bi_px_to_mpm[2]*/ - {120, 667},/*core_bi_px_to_mpm[3]*/ - {121, 668},/*core_bi_px_to_mpm[4]*/ - {122, 669},/*core_bi_px_gpio_41*/ - {123, 670},/*core_bi_px_gpio_89*/ - {124, 671},/*core_bi_px_gpio_31*/ - {125, 95},/*core_bi_px_gpio_49*/ + {30, 542},/*core_bi_px_core_in_mx_gpio_38*/ + {31, 543},/*core_bi_px_core_in_mx_gpio_3*/ + {32, 544},/*core_bi_px_core_in_mx_gpio_5*/ + {33, 545},/*core_bi_px_core_in_mx_gpio_8*/ + {34, 546},/*core_bi_px_core_in_mx_gpio_9*/ + {35, 547},/*gp_irq_hvm[5]*/ + {36, 548},/*core_bi_px_core_in_mx_gpio_134*/ + {37, 549},/*core_bi_px_core_in_mx_gpio_24*/ + {38, 550},/*core_bi_px_core_in_mx_gpio_26*/ + {39, 551},/*core_bi_px_core_in_mx_gpio_30*/ + {40, 552},/*core_bi_px_core_in_mx_gpio_101*/ + {41, 553},/*core_bi_px_core_in_mx_gpio_27*/ + {42, 554},/*core_bi_px_core_in_mx_gpio_28*/ + {43, 555},/*core_bi_px_core_in_mx_gpio_36*/ + {44, 556},/*core_bi_px_core_in_mx_gpio_37*/ + {45, 557},/*gp_irq_hvm[15]*/ + {46, 558},/*gp_irq_hvm[16]*/ + {47, 559},/*core_bi_px_core_in_mx_gpio_41*/ + {48, 560},/*core_bi_px_core_in_mx_gpio_42*/ + {49, 561},/*core_bi_px_core_in_mx_gpio_47*/ + {50, 562},/*core_bi_px_core_in_mx_gpio_46*/ + {51, 563},/*core_bi_px_core_in_mx_gpio_48*/ + {52, 564},/*core_bi_px_core_in_mx_gpio_50*/ + {53, 565},/*core_bi_px_core_in_mx_gpio_49*/ + {54, 566},/*core_bi_px_core_in_mx_gpio_53*/ + {55, 567},/*core_bi_px_core_in_mx_gpio_54*/ + {56, 568},/*core_bi_px_core_in_mx_gpio_55*/ + {57, 569},/*core_bi_px_core_in_mx_gpio_56*/ + {58, 570},/*core_bi_px_core_in_mx_gpio_58*/ + {59, 571},/*gp_irq_hvm[29]*/ + {60, 572},/*core_bi_px_core_in_mx_gpio_60*/ + {61, 573},/*core_bi_px_core_in_mx_gpio_61_from_and_gate_to_mpm*/ + {62, 574},/*core_bi_px_core_in_mx_gpio_68*/ + {63, 575},/*core_bi_px_core_in_mx_gpio_70*/ + {64, 576},/*core_bi_px_core_in_mx_gpio_81*/ + {65, 577},/*core_bi_px_core_in_mx_gpio_83*/ + {66, 578},/*core_bi_px_core_in_mx_gpio_77*/ + {67, 579},/*core_bi_px_core_in_mx_gpio_86*/ + {68, 580},/*gp_irq_hvm[38]*/ + {69, 581},/*core_bi_px_core_in_mx_gpio_90*/ + {70, 582},/*core_bi_px_core_in_mx_gpio_91*/ + {71, 583},/*core_bi_px_core_in_mx_gpio_76*/ + {72, 584},/*core_bi_px_core_in_mx_gpio_95*/ + {73, 585},/*core_bi_px_core_in_mx_gpio_96_from_and_gate_to_mpm*/ + {74, 586},/*core_bi_px_core_in_mx_gpio_97*/ + {75, 587},/*core_bi_px_core_in_mx_gpio_93*/ + {76, 588},/*gp_irq_hvm[46]*/ + {77, 589},/*core_bi_px_core_in_mx_gpio_103*/ + {78, 590},/*core_bi_px_core_in_mx_gpio_104*/ + {79, 591},/*core_bi_px_core_in_mx_gpio_108_from_and_gate_to_mpm*/ + {80, 592},/*core_bi_px_core_in_mx_gpio_112_from_and_gate_to_mpm*/ + {81, 593},/*core_bi_px_core_in_mx_gpio_113_from_and_gate_to_mpm*/ + {82, 594},/*core_bi_px_core_in_mx_gpio_114*/ + {83, 595},/*core_bi_px_core_in_mx_gpio_133*/ + {84, 596},/*core_bi_px_core_in_mx_gpio_87*/ + {85, 597},/*core_bi_px_core_in_mx_gpio_117*/ + {86, 598},/*gp_irq_hvm[56]*/ + {87, 599},/*core_bi_px_core_in_mx_gpio_119*/ + {88, 600},/*core_bi_px_core_in_mx_gpio_120*/ + {89, 601},/*core_bi_px_core_in_mx_gpio_121*/ + {90, 602},/*core_bi_px_core_in_mx_gpio_122*/ + {91, 603},/*core_bi_px_core_in_mx_gpio_123*/ + {92, 604},/*core_bi_px_core_in_mx_gpio_124*/ + {93, 605},/*core_bi_px_core_in_mx_gpio_125*/ + {94, 641},/*core_bi_px_core_in_mx_gpio_129*/ + {95, 642},/*gp_irq_hvm[65]*/ + {96, 643},/*gp_irq_hvm[66]*/ + {97, 644},/*core_bi_px_core_in_mx_gpio_136*/ + {98, 645},/*gp_irq_hvm[68]*/ + {99, 646},/*gp_irq_hvm[69]*/ + {100, 647},/*core_bi_px_core_in_mx_gpio_10*/ + {101, 648},/*core_bi_px_core_in_mx_gpio_118*/ + {102, 649},/*core_bi_px_core_in_mx_gpio_147*/ + {103, 650},/*core_bi_px_core_in_mx_gpio_142*/ + {104, 651},/*core_bi_px_core_in_mx_gpio_12*/ + {105, 652},/*core_bi_px_core_in_mx_gpio_132*/ + {106, 653},/*gp_irq_hvm[76]*/ + {107, 654},/*core_bi_px_core_in_mx_gpio_150*/ + {108, 655},/*core_bi_px_core_in_mx_gpio_152*/ + {109, 656},/*core_bi_px_core_in_mx_gpio_153*/ + {110, 657},/*gp_irq_hvm[80]*/ + {111, 658},/*gp_irq_hvm[81]*/ + {112, 659},/*gp_irq_hvm[82]*/ + {113, 660},/*gp_irq_hvm[83]*/ + {114, 661},/*gp_irq_hvm[84]*/ + {115, 662},/*core_bi_px_core_in_mx_gpio_144*/ + {116, 663},/*core_bi_px_core_in_mx_gpio_51*/ + {117, 664},/*core_bi_px_core_in_mx_gpio_88*/ + {118, 665},/*core_bi_px_core_in_mx_gpio_39*/ + {119, 666},/*core_bi_px_core_in_mx_gpio_sdc2_data_1_from_and_to_mpm*/ + {120, 667},/*core_bi_px_core_in_mx_gpio_sdc2_data_3_from_and__to_mpm*/ + {121, 668},/*core_bi_px_core_in_mx_gpio_sdc2_cmd_from_and_gate_to_mpm*/ + {122, 669},/*core_bi_px_core_in_mx_gpio_144*/ + {123, 670},/*core_bi_px_core_in_mx_gpio_51*/ + {124, 671},/*core_bi_px_core_in_mx_gpio_88*/ + {125, 95},/*core_bi_px_core_in_mx_gpio_39*/ {-1}, }; diff --git a/drivers/pinctrl/qcom/pinctrl-sm8150.c b/drivers/pinctrl/qcom/pinctrl-sm8150.c index fc37f55c6568..33c16f295d31 100644 --- a/drivers/pinctrl/qcom/pinctrl-sm8150.c +++ b/drivers/pinctrl/qcom/pinctrl-sm8150.c @@ -53,6 +53,9 @@ .intr_cfg_reg = base + 0x8 + REG_SIZE * id, \ .intr_status_reg = base + 0xc + REG_SIZE * id, \ .intr_target_reg = base + 0x8 + REG_SIZE * id, \ + .dir_conn_reg = (base == EAST) ? base + 0xb7000 : \ + ((base == WEST) ? base + 0xbb000 : \ + ((base == NORTH) ? base + 0xbc000 : base + 0xbe000)), \ .mux_bit = 2, \ .pull_bit = 0, \ .drv_bit = 6, \ @@ -67,6 +70,7 @@ .intr_polarity_bit = 1, \ .intr_detection_bit = 2, \ .intr_detection_width = 2, \ + .dir_conn_en_bit = 8, \ } #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ @@ -1845,6 +1849,89 @@ static const struct msm_pingroup sm8150_groups[] = { [178] = UFS_RESET(ufs_reset, 0xdb6004), }; +static struct msm_dir_conn sm8150_dir_conn[] = { + {3, 511}, + {5, 512}, + {8, 513}, + {9, 514}, + {10, 615}, + {12, 619}, + {24, 517}, + {26, 518}, + {27, 521}, + {28, 522}, + {30, 519}, + {36, 523}, + {37, 524}, + {38, 510}, + {39, 633}, /* GPIO 39 mapped to 640 SPI as well */ + {41, 527}, + {42, 528}, + {46, 530}, + {47, 529}, + {48, 531}, + {49, 533}, + {50, 532}, + {51, 631}, /* GPIO 51 mapped to SPI 638 as well */ + {53, 534}, + {54, 535}, + {55, 536}, + {56, 537}, + {58, 538}, + {60, 540}, + {61, 541}, + {68, 542}, + {70, 543}, + {76, 551}, + {77, 546}, + {81, 544}, + {83, 545}, + {86, 547}, + {87, 564}, + {88, 632}, /* GPIO 88 mapped to SPI 639 as well */ + {90, 549}, + {91, 550}, + {93, 555}, + {95, 552}, + {96, 553}, + {97, 554}, + {101, 520}, + {103, 557}, + {104, 558}, + {108, 559}, + {112, 560}, + {113, 561}, + {114, 562}, + {117, 565}, + {118, 616}, + {119, 567}, + {120, 568}, + {121, 569}, + {122, 570}, + {123, 571}, + {124, 572}, + {125, 573}, + {129, 609}, + {132, 620}, + {133, 563}, + {134, 516}, + {136, 612}, + {142, 618}, + {144, 630}, /* GPIO 144 mapped to SPI 637 as well */ + {147, 617}, + {150, 622}, + {152, 623}, + {153, 624}, + {0, 216}, + {0, 215}, + {0, 214}, + {0, 213}, + {0, 212}, + {0, 211}, + {0, 210}, + {0, 209}, +}; + static const struct msm_pinctrl_soc_data sm8150_pinctrl = { .pins = sm8150_pins, .npins = ARRAY_SIZE(sm8150_pins), @@ -1853,6 +1940,9 @@ static const struct msm_pinctrl_soc_data sm8150_pinctrl = { .groups = sm8150_groups, .ngroups = ARRAY_SIZE(sm8150_groups), .ngpios = 175, + .dir_conn = sm8150_dir_conn, + .n_dir_conns = ARRAY_SIZE(sm8150_dir_conn), + .dir_conn_irq_base = 216, }; static int sm8150_pinctrl_probe(struct platform_device *pdev)