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x86/docs: add description for cache_disable sysfs interface
Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com> Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Cc: Andrew Morton <akpm@linux-foundation.org> LKML-Reference: <20090409133153.GL31527@alberich.amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Documentation/ABI/testing/sysfs-devices-cache_disable
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Documentation/ABI/testing/sysfs-devices-cache_disable
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What: /sys/devices/system/cpu/cpu*/cache/index*/cache_disable_X
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Date: August 2008
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KernelVersion: 2.6.27
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Contact: mark.langsdorf@amd.com
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Description: These files exist in every cpu's cache index directories.
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There are currently 2 cache_disable_# files in each
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directory. Reading from these files on a supported
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processor will return that cache disable index value
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for that processor and node. Writing to one of these
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files will cause the specificed cache index to be disabled.
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Currently, only AMD Family 10h Processors support cache index
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disable, and only for their L3 caches. See the BIOS and
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Kernel Developer's Guide at
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http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116-Public-GH-BKDG_3.20_2-4-09.pdf
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for formatting information and other details on the
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cache index disable.
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Users: joachim.deguara@amd.com
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