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KVM: PPC: Book3S HV: trace_tlbie must not be called in realmode
commit 19ce7909ed11c49f7eddf59e7f49cd3062bf83d5 upstream. This crashes with a "Bad real address for load" attempting to load from the vmalloc region in realmode (faulting address is in DAR). Oops: Bad interrupt in KVM entry/exit code, sig: 6 [#1] LE SMP NR_CPUS=2048 NUMA PowerNV CPU: 53 PID: 6582 Comm: qemu-system-ppc Not tainted 4.16.0-01530-g43d1859f0994 NIP: c0000000000155ac LR: c0000000000c2430 CTR: c000000000015580 REGS: c000000fff76dd80 TRAP: 0200 Not tainted (4.16.0-01530-g43d1859f0994) MSR: 9000000000201003 <SF,HV,ME,RI,LE> CR: 48082222 XER: 00000000 CFAR: 0000000102900ef0 DAR: d00017fffd941a28 DSISR: 00000040 SOFTE: 3 NIP [c0000000000155ac] perf_trace_tlbie+0x2c/0x1a0 LR [c0000000000c2430] do_tlbies+0x230/0x2f0 I suspect the reason is the per-cpu data is not in the linear chunk. This could be restored if that was able to be fixed, but for now, just remove the tracepoints. Fixes: 0428491cba92 ("powerpc/mm: Trace tlbie(l) instructions") Cc: stable@vger.kernel.org # v4.13+ Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -447,8 +447,6 @@ static void do_tlbies(struct kvm *kvm, unsigned long *rbvalues,
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for (i = 0; i < npages; ++i) {
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for (i = 0; i < npages; ++i) {
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asm volatile(PPC_TLBIE_5(%0,%1,0,0,0) : :
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asm volatile(PPC_TLBIE_5(%0,%1,0,0,0) : :
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"r" (rbvalues[i]), "r" (kvm->arch.lpid));
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"r" (rbvalues[i]), "r" (kvm->arch.lpid));
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trace_tlbie(kvm->arch.lpid, 0, rbvalues[i],
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kvm->arch.lpid, 0, 0, 0);
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}
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}
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asm volatile("eieio; tlbsync; ptesync" : : : "memory");
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asm volatile("eieio; tlbsync; ptesync" : : : "memory");
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kvm->arch.tlbie_lock = 0;
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kvm->arch.tlbie_lock = 0;
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@ -458,8 +456,6 @@ static void do_tlbies(struct kvm *kvm, unsigned long *rbvalues,
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for (i = 0; i < npages; ++i) {
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for (i = 0; i < npages; ++i) {
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asm volatile(PPC_TLBIEL(%0,%1,0,0,0) : :
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asm volatile(PPC_TLBIEL(%0,%1,0,0,0) : :
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"r" (rbvalues[i]), "r" (0));
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"r" (rbvalues[i]), "r" (0));
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trace_tlbie(kvm->arch.lpid, 1, rbvalues[i],
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0, 0, 0, 0);
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}
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}
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asm volatile("ptesync" : : : "memory");
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asm volatile("ptesync" : : : "memory");
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}
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}
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