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This is the 4.14.329 stable release

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Merge 4.14.329 into android-4.14-stable

Changes in 4.14.329
	mcb: Return actual parsed size when reading chameleon table
	mcb-lpc: Reallocate memory region to avoid memory overlapping
	virtio_balloon: Fix endless deflation and inflation on arm64
	treewide: Spelling fix in comment
	igb: Fix potential memory leak in igb_add_ethtool_nfc_entry
	r8152: Increase USB control msg timeout to 5000ms as per spec
	tcp: fix wrong RTO timeout when received SACK reneging
	gtp: uapi: fix GTPA_MAX
	i40e: Fix wrong check for I40E_TXR_FLAGS_WB_ON_ITR
	i2c: muxes: i2c-mux-pinctrl: Use of_get_i2c_adapter_by_node()
	i2c: muxes: i2c-mux-gpmux: Use of_get_i2c_adapter_by_node()
	i2c: muxes: i2c-demux-pinctrl: Use of_get_i2c_adapter_by_node()
	perf/core: Fix potential NULL deref
	NFS: Don't call generic_error_remove_page() while holding locks
	ARM: 8933/1: replace Sun/Solaris style flag on section directive
	drm/dp_mst: Fix NULL deref in get_mst_branch_device_by_guid_helper()
	kobject: Fix slab-out-of-bounds in fill_kobj_path()
	f2fs: fix to do sanity check on inode type during garbage collection
	nfsd: lock_rename() needs both directories to live on the same fs
	x86/i8259: Skip probing when ACPI/MADT advertises PCAT compatibility
	x86/mm: Simplify RESERVE_BRK()
	x86/mm: Fix RESERVE_BRK() for older binutils
	driver: platform: Add helper for safer setting of driver_override
	rpmsg: Fix kfree() of static memory on setting driver_override
	rpmsg: Fix calling device_lock() on non-initialized device
	rpmsg: glink: Release driver_override
	rpmsg: Fix possible refcount leak in rpmsg_register_device_override()
	x86: Fix .brk attribute in linker script
	ASoC: simple-card: fixup asoc_simple_probe() error handling
	irqchip/stm32-exti: add missing DT IRQ flag translation
	dmaengine: ste_dma40: Fix PM disable depth imbalance in d40_probe
	Input: synaptics-rmi4 - handle reset delay when using SMBus trsnsport
	fbdev: atyfb: only use ioremap_uc() on i386 and ia64
	netfilter: nfnetlink_log: silence bogus compiler warning
	ASoC: rt5650: fix the wrong result of key button
	fbdev: uvesafb: Call cn_del_callback() at the end of uvesafb_exit()
	scsi: mpt3sas: Fix in error path
	platform/x86: asus-wmi: Change ASUS_WMI_BRN_DOWN code from 0x20 to 0x2e
	net: chelsio: cxgb4: add an error code check in t4_load_phy_fw
	ata: ahci: fix enum constants for gcc-13
	remove the sx8 block driver
	vc_screen: move load of struct vc_data pointer in vcs_read() to avoid UAF
	PCI: Prevent xHCI driver from claiming AMD VanGogh USB3 DRD device
	usb: storage: set 1.50 as the lower bcdDevice for older "Super Top" compatibility
	tty: 8250: Remove UC-257 and UC-431
	tty: 8250: Add support for additional Brainboxes UC cards
	tty: 8250: Add support for Brainboxes UP cards
	tty: 8250: Add support for Intashield IS-100
	Linux 4.14.329

Change-Id: If187990b63eb0e3467f9d483ab7638db2640d0f3
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman 2023-11-08 11:07:27 +00:00
commit 47ab076483
81 changed files with 597 additions and 2045 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Makefile
View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 4
PATCHLEVEL = 14
SUBLEVEL = 328
SUBLEVEL = 329
EXTRAVERSION =
NAME = Petit Gorille

2
arch/arm/boot/bootp/init.S
View File

@ -16,7 +16,7 @@
* size immediately following the kernel, we could build this into
* a binary blob, and concatenate the zImage using the cat command.
*/
.section .start,#alloc,#execinstr
.section .start, "ax"
.type _start, #function
.globl _start

2
arch/arm/boot/compressed/big-endian.S
View File

@ -6,7 +6,7 @@
* Author: Nicolas Pitre
*/
.section ".start", #alloc, #execinstr
.section ".start", "ax"
mrc p15, 0, r0, c1, c0, 0 @ read control reg
orr r0, r0, #(1 << 7) @ enable big endian mode

2
arch/arm/boot/compressed/head.S
View File

@ -114,7 +114,7 @@
#endif
.endm
.section ".start", #alloc, #execinstr
.section ".start", "ax"
/*
* sort out different calling conventions
*/

2
arch/arm/boot/compressed/piggy.S
View File

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0 */
.section .piggydata,#alloc
.section .piggydata, "a"
.globl input_data
input_data:
.incbin "arch/arm/boot/compressed/piggy_data"

2
arch/arm/mm/proc-arm1020.S
View File

@ -505,7 +505,7 @@ cpu_arm1020_name:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.type __arm1020_proc_info,#object
__arm1020_proc_info:

2
arch/arm/mm/proc-arm1020e.S
View File

@ -463,7 +463,7 @@ arm1020e_crval:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.type __arm1020e_proc_info,#object
__arm1020e_proc_info:

2
arch/arm/mm/proc-arm1022.S
View File

@ -448,7 +448,7 @@ arm1022_crval:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.type __arm1022_proc_info,#object
__arm1022_proc_info:

2
arch/arm/mm/proc-arm1026.S
View File

@ -442,7 +442,7 @@ arm1026_crval:
string cpu_arm1026_name, "ARM1026EJ-S"
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.type __arm1026_proc_info,#object
__arm1026_proc_info:

2
arch/arm/mm/proc-arm720.S
View File

@ -186,7 +186,7 @@ arm720_crval:
* See <asm/procinfo.h> for a definition of this structure.
*/
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.macro arm720_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cpu_flush:req
.type __\name\()_proc_info,#object

2
arch/arm/mm/proc-arm740.S
View File

@ -132,7 +132,7 @@ __arm740_setup:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.type __arm740_proc_info,#object
__arm740_proc_info:
.long 0x41807400

2
arch/arm/mm/proc-arm7tdmi.S
View File

@ -76,7 +76,7 @@ __arm7tdmi_setup:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.macro arm7tdmi_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, \
extra_hwcaps=0

2
arch/arm/mm/proc-arm920.S
View File

@ -448,7 +448,7 @@ arm920_crval:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.type __arm920_proc_info,#object
__arm920_proc_info:

2
arch/arm/mm/proc-arm922.S
View File

@ -426,7 +426,7 @@ arm922_crval:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.type __arm922_proc_info,#object
__arm922_proc_info:

2
arch/arm/mm/proc-arm925.S
View File

@ -491,7 +491,7 @@ arm925_crval:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.macro arm925_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cache
.type __\name\()_proc_info,#object

2
arch/arm/mm/proc-arm926.S
View File

@ -474,7 +474,7 @@ arm926_crval:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.type __arm926_proc_info,#object
__arm926_proc_info:

2
arch/arm/mm/proc-arm940.S
View File

@ -344,7 +344,7 @@ __arm940_setup:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.type __arm940_proc_info,#object
__arm940_proc_info:

2
arch/arm/mm/proc-arm946.S
View File

@ -399,7 +399,7 @@ __arm946_setup:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.type __arm946_proc_info,#object
__arm946_proc_info:
.long 0x41009460

2
arch/arm/mm/proc-arm9tdmi.S
View File

@ -70,7 +70,7 @@ __arm9tdmi_setup:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.macro arm9tdmi_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req
.type __\name\()_proc_info, #object

2
arch/arm/mm/proc-fa526.S
View File

@ -190,7 +190,7 @@ fa526_cr1_set:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.type __fa526_proc_info,#object
__fa526_proc_info:

2
arch/arm/mm/proc-feroceon.S
View File

@ -584,7 +584,7 @@ feroceon_crval:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.macro feroceon_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cache:req
.type __\name\()_proc_info,#object

2
arch/arm/mm/proc-mohawk.S
View File

@ -429,7 +429,7 @@ mohawk_crval:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.type __88sv331x_proc_info,#object
__88sv331x_proc_info:

2
arch/arm/mm/proc-sa110.S
View File

@ -199,7 +199,7 @@ sa110_crval:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.type __sa110_proc_info,#object
__sa110_proc_info:

2
arch/arm/mm/proc-sa1100.S
View File

@ -242,7 +242,7 @@ sa1100_crval:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.macro sa1100_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req
.type __\name\()_proc_info,#object

2
arch/arm/mm/proc-v6.S
View File

@ -264,7 +264,7 @@ v6_crval:
string cpu_elf_name, "v6"
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
/*
* Match any ARMv6 processor core.

2
arch/arm/mm/proc-v7.S
View File

@ -636,7 +636,7 @@ __v7_setup_stack:
string cpu_elf_name, "v7"
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
/*
* Standard v7 proc info content

4
arch/arm/mm/proc-v7m.S
View File

@ -96,7 +96,7 @@ ENTRY(cpu_cm7_proc_fin)
ret lr
ENDPROC(cpu_cm7_proc_fin)
.section ".init.text", #alloc, #execinstr
.section ".init.text", "ax"
__v7m_cm7_setup:
mov r8, #(V7M_SCB_CCR_DC | V7M_SCB_CCR_IC| V7M_SCB_CCR_BP)
@ -181,7 +181,7 @@ ENDPROC(__v7m_setup)
string cpu_elf_name "v7m"
string cpu_v7m_name "ARMv7-M"
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.macro __v7m_proc name, initfunc, cache_fns = nop_cache_fns, hwcaps = 0, proc_fns = v7m_processor_functions
.long 0 /* proc_info_list.__cpu_mm_mmu_flags */

2
arch/arm/mm/proc-xsc3.S
View File

@ -499,7 +499,7 @@ xsc3_crval:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.macro xsc3_proc_info name:req, cpu_val:req, cpu_mask:req
.type __\name\()_proc_info,#object

2
arch/arm/mm/proc-xscale.S
View File

@ -613,7 +613,7 @@ xscale_crval:
.align
.section ".proc.info.init", #alloc
.section ".proc.info.init", "a"
.macro xscale_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cache
.type __\name\()_proc_info,#object

2
arch/x86/include/asm/i8259.h
View File

@ -67,6 +67,8 @@ struct legacy_pic {
void (*make_irq)(unsigned int irq);
};
void legacy_pic_pcat_compat(void);
extern struct legacy_pic *legacy_pic;
extern struct legacy_pic null_legacy_pic;

46
arch/x86/include/asm/setup.h
View File

@ -91,27 +91,16 @@ extern unsigned long _brk_end;
void *extend_brk(size_t size, size_t align);
/*
* Reserve space in the brk section. The name must be unique within
* the file, and somewhat descriptive. The size is in bytes. Must be
* used at file scope.
* Reserve space in the .brk section, which is a block of memory from which the
* caller is allowed to allocate very early (before even memblock is available)
* by calling extend_brk(). All allocated memory will be eventually converted
* to memblock. Any leftover unallocated memory will be freed.
*
* (This uses a temp function to wrap the asm so we can pass it the
* size parameter; otherwise we wouldn't be able to. We can't use a
* "section" attribute on a normal variable because it always ends up
* being @progbits, which ends up allocating space in the vmlinux
* executable.)
* The size is in bytes.
*/
#define RESERVE_BRK(name,sz) \
static void __section(.discard.text) __used notrace \
__brk_reservation_fn_##name##__(void) { \
asm volatile ( \
".pushsection .brk_reservation,\"aw\",@nobits;" \
".brk." #name ":" \
" 1:.skip %c0;" \
" .size .brk." #name ", . - 1b;" \
" .popsection" \
: : "i" (sz)); \
}
#define RESERVE_BRK(name, size) \
__section(.bss..brk) __aligned(1) __used \
static char __brk_##name[size]
/* Helper for reserving space for arrays of things */
#define RESERVE_BRK_ARRAY(type, name, entries) \
@ -129,12 +118,19 @@ asmlinkage void __init x86_64_start_reservations(char *real_mode_data);
#endif /* __i386__ */
#endif /* _SETUP */
#else
#define RESERVE_BRK(name,sz) \
.pushsection .brk_reservation,"aw",@nobits; \
.brk.name: \
1: .skip sz; \
.size .brk.name,.-1b; \
#else /* __ASSEMBLY */
.macro __RESERVE_BRK name, size
.pushsection .bss..brk, "aw"
GLOBAL(__brk_\name)
.skip \size
END(__brk_\name)
.popsection
.endm
#define RESERVE_BRK(name, size) __RESERVE_BRK name, size
#endif /* __ASSEMBLY__ */
#endif /* _ASM_X86_SETUP_H */

3
arch/x86/kernel/acpi/boot.c
View File

@ -156,6 +156,9 @@ static int __init acpi_parse_madt(struct acpi_table_header *table)
madt->address);
}
if (madt->flags & ACPI_MADT_PCAT_COMPAT)
legacy_pic_pcat_compat();
default_acpi_madt_oem_check(madt->header.oem_id,
madt->header.oem_table_id);

38
arch/x86/kernel/i8259.c
View File

@ -32,6 +32,7 @@
*/
static void init_8259A(int auto_eoi);
static bool pcat_compat __ro_after_init;
static int i8259A_auto_eoi;
DEFINE_RAW_SPINLOCK(i8259A_lock);
@ -300,15 +301,32 @@ static void unmask_8259A(void)
static int probe_8259A(void)
{
unsigned char new_val, probe_val = ~(1 << PIC_CASCADE_IR);
unsigned long flags;
unsigned char probe_val = ~(1 << PIC_CASCADE_IR);
unsigned char new_val;
/*
* Check to see if we have a PIC.
* Mask all except the cascade and read
* back the value we just wrote. If we don't
* have a PIC, we will read 0xff as opposed to the
* value we wrote.
* If MADT has the PCAT_COMPAT flag set, then do not bother probing
* for the PIC. Some BIOSes leave the PIC uninitialized and probing
* fails.
*
* Right now this causes problems as quite some code depends on
* nr_legacy_irqs() > 0 or has_legacy_pic() == true. This is silly
* when the system has an IO/APIC because then PIC is not required
* at all, except for really old machines where the timer interrupt
* must be routed through the PIC. So just pretend that the PIC is
* there and let legacy_pic->init() initialize it for nothing.
*
* Alternatively this could just try to initialize the PIC and
* repeat the probe, but for cases where there is no PIC that's
* just pointless.
*/
if (pcat_compat)
return nr_legacy_irqs();
/*
* Check to see if we have a PIC. Mask all except the cascade and
* read back the value we just wrote. If we don't have a PIC, we
* will read 0xff as opposed to the value we wrote.
*/
raw_spin_lock_irqsave(&i8259A_lock, flags);
@ -430,5 +448,9 @@ static int __init i8259A_init_ops(void)
return 0;
}
device_initcall(i8259A_init_ops);
void __init legacy_pic_pcat_compat(void)
{
pcat_compat = true;
}

2
arch/x86/kernel/vmlinux.lds.S
View File

@ -367,7 +367,7 @@ SECTIONS
.brk : AT(ADDR(.brk) - LOAD_OFFSET) {
__brk_base = .;
. += 64 * 1024; /* 64k alignment slop space */
*(.brk_reservation) /* areas brk users have reserved */
*(.bss..brk) /* areas brk users have reserved */
__brk_limit = .;
}

226
drivers/ata/ahci.h
View File

@ -40,6 +40,7 @@
#include <linux/libata.h>
#include <linux/phy/phy.h>
#include <linux/regulator/consumer.h>
#include <linux/bits.h>
/* Enclosure Management Control */
#define EM_CTRL_MSG_TYPE 0x000f0000
@ -70,12 +71,12 @@ enum {
AHCI_PORT_PRIV_FBS_DMA_SZ = AHCI_CMD_SLOT_SZ +
AHCI_CMD_TBL_AR_SZ +
(AHCI_RX_FIS_SZ * 16),
AHCI_IRQ_ON_SG = (1 << 31),
AHCI_CMD_ATAPI = (1 << 5),
AHCI_CMD_WRITE = (1 << 6),
AHCI_CMD_PREFETCH = (1 << 7),
AHCI_CMD_RESET = (1 << 8),
AHCI_CMD_CLR_BUSY = (1 << 10),
AHCI_IRQ_ON_SG = BIT(31),
AHCI_CMD_ATAPI = BIT(5),
AHCI_CMD_WRITE = BIT(6),
AHCI_CMD_PREFETCH = BIT(7),
AHCI_CMD_RESET = BIT(8),
AHCI_CMD_CLR_BUSY = BIT(10),
RX_FIS_PIO_SETUP = 0x20, /* offset of PIO Setup FIS data */
RX_FIS_D2H_REG = 0x40, /* offset of D2H Register FIS data */
@ -93,37 +94,37 @@ enum {
HOST_CAP2 = 0x24, /* host capabilities, extended */
/* HOST_CTL bits */
HOST_RESET = (1 << 0), /* reset controller; self-clear */
HOST_IRQ_EN = (1 << 1), /* global IRQ enable */
HOST_MRSM = (1 << 2), /* MSI Revert to Single Message */
HOST_AHCI_EN = (1 << 31), /* AHCI enabled */
HOST_RESET = BIT(0), /* reset controller; self-clear */
HOST_IRQ_EN = BIT(1), /* global IRQ enable */
HOST_MRSM = BIT(2), /* MSI Revert to Single Message */
HOST_AHCI_EN = BIT(31), /* AHCI enabled */
/* HOST_CAP bits */
HOST_CAP_SXS = (1 << 5), /* Supports External SATA */
HOST_CAP_EMS = (1 << 6), /* Enclosure Management support */
HOST_CAP_CCC = (1 << 7), /* Command Completion Coalescing */
HOST_CAP_PART = (1 << 13), /* Partial state capable */
HOST_CAP_SSC = (1 << 14), /* Slumber state capable */
HOST_CAP_PIO_MULTI = (1 << 15), /* PIO multiple DRQ support */
HOST_CAP_FBS = (1 << 16), /* FIS-based switching support */
HOST_CAP_PMP = (1 << 17), /* Port Multiplier support */
HOST_CAP_ONLY = (1 << 18), /* Supports AHCI mode only */
HOST_CAP_CLO = (1 << 24), /* Command List Override support */
HOST_CAP_LED = (1 << 25), /* Supports activity LED */
HOST_CAP_ALPM = (1 << 26), /* Aggressive Link PM support */
HOST_CAP_SSS = (1 << 27), /* Staggered Spin-up */
HOST_CAP_MPS = (1 << 28), /* Mechanical presence switch */
HOST_CAP_SNTF = (1 << 29), /* SNotification register */
HOST_CAP_NCQ = (1 << 30), /* Native Command Queueing */
HOST_CAP_64 = (1 << 31), /* PCI DAC (64-bit DMA) support */
HOST_CAP_SXS = BIT(5), /* Supports External SATA */
HOST_CAP_EMS = BIT(6), /* Enclosure Management support */
HOST_CAP_CCC = BIT(7), /* Command Completion Coalescing */
HOST_CAP_PART = BIT(13), /* Partial state capable */
HOST_CAP_SSC = BIT(14), /* Slumber state capable */
HOST_CAP_PIO_MULTI = BIT(15), /* PIO multiple DRQ support */
HOST_CAP_FBS = BIT(16), /* FIS-based switching support */
HOST_CAP_PMP = BIT(17), /* Port Multiplier support */
HOST_CAP_ONLY = BIT(18), /* Supports AHCI mode only */
HOST_CAP_CLO = BIT(24), /* Command List Override support */
HOST_CAP_LED = BIT(25), /* Supports activity LED */
HOST_CAP_ALPM = BIT(26), /* Aggressive Link PM support */
HOST_CAP_SSS = BIT(27), /* Staggered Spin-up */
HOST_CAP_MPS = BIT(28), /* Mechanical presence switch */
HOST_CAP_SNTF = BIT(29), /* SNotification register */
HOST_CAP_NCQ = BIT(30), /* Native Command Queueing */
HOST_CAP_64 = BIT(31), /* PCI DAC (64-bit DMA) support */
/* HOST_CAP2 bits */
HOST_CAP2_BOH = (1 << 0), /* BIOS/OS handoff supported */
HOST_CAP2_NVMHCI = (1 << 1), /* NVMHCI supported */
HOST_CAP2_APST = (1 << 2), /* Automatic partial to slumber */
HOST_CAP2_SDS = (1 << 3), /* Support device sleep */
HOST_CAP2_SADM = (1 << 4), /* Support aggressive DevSlp */
HOST_CAP2_DESO = (1 << 5), /* DevSlp from slumber only */
HOST_CAP2_BOH = BIT(0), /* BIOS/OS handoff supported */
HOST_CAP2_NVMHCI = BIT(1), /* NVMHCI supported */
HOST_CAP2_APST = BIT(2), /* Automatic partial to slumber */
HOST_CAP2_SDS = BIT(3), /* Support device sleep */
HOST_CAP2_SADM = BIT(4), /* Support aggressive DevSlp */
HOST_CAP2_DESO = BIT(5), /* DevSlp from slumber only */
/* registers for each SATA port */
PORT_LST_ADDR = 0x00, /* command list DMA addr */
@ -145,24 +146,25 @@ enum {
PORT_DEVSLP = 0x44, /* device sleep */
/* PORT_IRQ_{STAT,MASK} bits */
PORT_IRQ_COLD_PRES = (1 << 31), /* cold presence detect */
PORT_IRQ_TF_ERR = (1 << 30), /* task file error */
PORT_IRQ_HBUS_ERR = (1 << 29), /* host bus fatal error */
PORT_IRQ_HBUS_DATA_ERR = (1 << 28), /* host bus data error */
PORT_IRQ_IF_ERR = (1 << 27), /* interface fatal error */
PORT_IRQ_IF_NONFATAL = (1 << 26), /* interface non-fatal error */
PORT_IRQ_OVERFLOW = (1 << 24), /* xfer exhausted available S/G */
PORT_IRQ_BAD_PMP = (1 << 23), /* incorrect port multiplier */
PORT_IRQ_COLD_PRES = BIT(31), /* cold presence detect */
PORT_IRQ_TF_ERR = BIT(30), /* task file error */
PORT_IRQ_HBUS_ERR = BIT(29), /* host bus fatal error */
PORT_IRQ_HBUS_DATA_ERR = BIT(28), /* host bus data error */
PORT_IRQ_IF_ERR = BIT(27), /* interface fatal error */
PORT_IRQ_IF_NONFATAL = BIT(26), /* interface non-fatal error */
PORT_IRQ_OVERFLOW = BIT(24), /* xfer exhausted available S/G */
PORT_IRQ_BAD_PMP = BIT(23), /* incorrect port multiplier */
PORT_IRQ_PHYRDY = (1 << 22), /* PhyRdy changed */
PORT_IRQ_DEV_ILCK = (1 << 7), /* device interlock */
PORT_IRQ_CONNECT = (1 << 6), /* port connect change status */
PORT_IRQ_SG_DONE = (1 << 5), /* descriptor processed */
PORT_IRQ_UNK_FIS = (1 << 4), /* unknown FIS rx'd */
PORT_IRQ_SDB_FIS = (1 << 3), /* Set Device Bits FIS rx'd */
PORT_IRQ_DMAS_FIS = (1 << 2), /* DMA Setup FIS rx'd */
PORT_IRQ_PIOS_FIS = (1 << 1), /* PIO Setup FIS rx'd */
PORT_IRQ_D2H_REG_FIS = (1 << 0), /* D2H Register FIS rx'd */
PORT_IRQ_PHYRDY = BIT(22), /* PhyRdy changed */
PORT_IRQ_DEV_ILCK = BIT(7), /* device interlock */
PORT_IRQ_DMPS = BIT(7), /* mechanical presence status */
PORT_IRQ_CONNECT = BIT(6), /* port connect change status */
PORT_IRQ_SG_DONE = BIT(5), /* descriptor processed */
PORT_IRQ_UNK_FIS = BIT(4), /* unknown FIS rx'd */
PORT_IRQ_SDB_FIS = BIT(3), /* Set Device Bits FIS rx'd */
PORT_IRQ_DMAS_FIS = BIT(2), /* DMA Setup FIS rx'd */
PORT_IRQ_PIOS_FIS = BIT(1), /* PIO Setup FIS rx'd */
PORT_IRQ_D2H_REG_FIS = BIT(0), /* D2H Register FIS rx'd */
PORT_IRQ_FREEZE = PORT_IRQ_HBUS_ERR |
PORT_IRQ_IF_ERR |
@ -178,34 +180,34 @@ enum {
PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS,
/* PORT_CMD bits */
PORT_CMD_ASP = (1 << 27), /* Aggressive Slumber/Partial */
PORT_CMD_ALPE = (1 << 26), /* Aggressive Link PM enable */
PORT_CMD_ATAPI = (1 << 24), /* Device is ATAPI */
PORT_CMD_FBSCP = (1 << 22), /* FBS Capable Port */
PORT_CMD_ESP = (1 << 21), /* External Sata Port */
PORT_CMD_HPCP = (1 << 18), /* HotPlug Capable Port */
PORT_CMD_PMP = (1 << 17), /* PMP attached */
PORT_CMD_LIST_ON = (1 << 15), /* cmd list DMA engine running */
PORT_CMD_FIS_ON = (1 << 14), /* FIS DMA engine running */
PORT_CMD_FIS_RX = (1 << 4), /* Enable FIS receive DMA engine */
PORT_CMD_CLO = (1 << 3), /* Command list override */
PORT_CMD_POWER_ON = (1 << 2), /* Power up device */
PORT_CMD_SPIN_UP = (1 << 1), /* Spin up device */
PORT_CMD_START = (1 << 0), /* Enable port DMA engine */
PORT_CMD_ASP = BIT(27), /* Aggressive Slumber/Partial */
PORT_CMD_ALPE = BIT(26), /* Aggressive Link PM enable */
PORT_CMD_ATAPI = BIT(24), /* Device is ATAPI */
PORT_CMD_FBSCP = BIT(22), /* FBS Capable Port */
PORT_CMD_ESP = BIT(21), /* External Sata Port */
PORT_CMD_HPCP = BIT(18), /* HotPlug Capable Port */
PORT_CMD_PMP = BIT(17), /* PMP attached */
PORT_CMD_LIST_ON = BIT(15), /* cmd list DMA engine running */
PORT_CMD_FIS_ON = BIT(14), /* FIS DMA engine running */
PORT_CMD_FIS_RX = BIT(4), /* Enable FIS receive DMA engine */
PORT_CMD_CLO = BIT(3), /* Command list override */
PORT_CMD_POWER_ON = BIT(2), /* Power up device */
PORT_CMD_SPIN_UP = BIT(1), /* Spin up device */
PORT_CMD_START = BIT(0), /* Enable port DMA engine */
PORT_CMD_ICC_MASK = (0xf << 28), /* i/f ICC state mask */
PORT_CMD_ICC_ACTIVE = (0x1 << 28), /* Put i/f in active state */
PORT_CMD_ICC_PARTIAL = (0x2 << 28), /* Put i/f in partial state */
PORT_CMD_ICC_SLUMBER = (0x6 << 28), /* Put i/f in slumber state */
PORT_CMD_ICC_MASK = (0xfu << 28), /* i/f ICC state mask */
PORT_CMD_ICC_ACTIVE = (0x1u << 28), /* Put i/f in active state */
PORT_CMD_ICC_PARTIAL = (0x2u << 28), /* Put i/f in partial state */
PORT_CMD_ICC_SLUMBER = (0x6u << 28), /* Put i/f in slumber state */
/* PORT_FBS bits */
PORT_FBS_DWE_OFFSET = 16, /* FBS device with error offset */
PORT_FBS_ADO_OFFSET = 12, /* FBS active dev optimization offset */
PORT_FBS_DEV_OFFSET = 8, /* FBS device to issue offset */
PORT_FBS_DEV_MASK = (0xf << PORT_FBS_DEV_OFFSET), /* FBS.DEV */
PORT_FBS_SDE = (1 << 2), /* FBS single device error */
PORT_FBS_DEC = (1 << 1), /* FBS device error clear */
PORT_FBS_EN = (1 << 0), /* Enable FBS */
PORT_FBS_SDE = BIT(2), /* FBS single device error */
PORT_FBS_DEC = BIT(1), /* FBS device error clear */
PORT_FBS_EN = BIT(0), /* Enable FBS */
/* PORT_DEVSLP bits */
PORT_DEVSLP_DM_OFFSET = 25, /* DITO multiplier offset */
@ -213,44 +215,44 @@ enum {
PORT_DEVSLP_DITO_OFFSET = 15, /* DITO offset */
PORT_DEVSLP_MDAT_OFFSET = 10, /* Minimum assertion time */
PORT_DEVSLP_DETO_OFFSET = 2, /* DevSlp exit timeout */
PORT_DEVSLP_DSP = (1 << 1), /* DevSlp present */
PORT_DEVSLP_ADSE = (1 << 0), /* Aggressive DevSlp enable */
PORT_DEVSLP_DSP = BIT(1), /* DevSlp present */
PORT_DEVSLP_ADSE = BIT(0), /* Aggressive DevSlp enable */
/* hpriv->flags bits */
#define AHCI_HFLAGS(flags) .private_data = (void *)(flags)
AHCI_HFLAG_NO_NCQ = (1 << 0),
AHCI_HFLAG_IGN_IRQ_IF_ERR = (1 << 1), /* ignore IRQ_IF_ERR */
AHCI_HFLAG_IGN_SERR_INTERNAL = (1 << 2), /* ignore SERR_INTERNAL */
AHCI_HFLAG_32BIT_ONLY = (1 << 3), /* force 32bit */
AHCI_HFLAG_MV_PATA = (1 << 4), /* PATA port */
AHCI_HFLAG_NO_MSI = (1 << 5), /* no PCI MSI */
AHCI_HFLAG_NO_PMP = (1 << 6), /* no PMP */
AHCI_HFLAG_SECT255 = (1 << 8), /* max 255 sectors */
AHCI_HFLAG_YES_NCQ = (1 << 9), /* force NCQ cap on */
AHCI_HFLAG_NO_SUSPEND = (1 << 10), /* don't suspend */
AHCI_HFLAG_SRST_TOUT_IS_OFFLINE = (1 << 11), /* treat SRST timeout as
link offline */
AHCI_HFLAG_NO_SNTF = (1 << 12), /* no sntf */
AHCI_HFLAG_NO_FPDMA_AA = (1 << 13), /* no FPDMA AA */
AHCI_HFLAG_YES_FBS = (1 << 14), /* force FBS cap on */
AHCI_HFLAG_DELAY_ENGINE = (1 << 15), /* do not start engine on
port start (wait until
error-handling stage) */
AHCI_HFLAG_NO_DEVSLP = (1 << 17), /* no device sleep */
AHCI_HFLAG_NO_FBS = (1 << 18), /* no FBS */
AHCI_HFLAG_NO_NCQ = BIT(0),
AHCI_HFLAG_IGN_IRQ_IF_ERR = BIT(1), /* ignore IRQ_IF_ERR */
AHCI_HFLAG_IGN_SERR_INTERNAL = BIT(2), /* ignore SERR_INTERNAL */
AHCI_HFLAG_32BIT_ONLY = BIT(3), /* force 32bit */
AHCI_HFLAG_MV_PATA = BIT(4), /* PATA port */
AHCI_HFLAG_NO_MSI = BIT(5), /* no PCI MSI */
AHCI_HFLAG_NO_PMP = BIT(6), /* no PMP */
AHCI_HFLAG_SECT255 = BIT(8), /* max 255 sectors */
AHCI_HFLAG_YES_NCQ = BIT(9), /* force NCQ cap on */
AHCI_HFLAG_NO_SUSPEND = BIT(10), /* don't suspend */
AHCI_HFLAG_SRST_TOUT_IS_OFFLINE = BIT(11), /* treat SRST timeout as
link offline */
AHCI_HFLAG_NO_SNTF = BIT(12), /* no sntf */
AHCI_HFLAG_NO_FPDMA_AA = BIT(13), /* no FPDMA AA */
AHCI_HFLAG_YES_FBS = BIT(14), /* force FBS cap on */
AHCI_HFLAG_DELAY_ENGINE = BIT(15), /* do not start engine on
port start (wait until
error-handling stage) */
AHCI_HFLAG_NO_DEVSLP = BIT(17), /* no device sleep */
AHCI_HFLAG_NO_FBS = BIT(18), /* no FBS */
#ifdef CONFIG_PCI_MSI
AHCI_HFLAG_MULTI_MSI = (1 << 20), /* per-port MSI(-X) */
AHCI_HFLAG_MULTI_MSI = BIT(20), /* per-port MSI(-X) */
#else
/* compile out MSI infrastructure */
AHCI_HFLAG_MULTI_MSI = 0,
#endif
AHCI_HFLAG_WAKE_BEFORE_STOP = (1 << 22), /* wake before DMA stop */
AHCI_HFLAG_YES_ALPM = (1 << 23), /* force ALPM cap on */
AHCI_HFLAG_NO_WRITE_TO_RO = (1 << 24), /* don't write to read
only registers */
AHCI_HFLAG_WAKE_BEFORE_STOP = BIT(22), /* wake before DMA stop */
AHCI_HFLAG_YES_ALPM = BIT(23), /* force ALPM cap on */
AHCI_HFLAG_NO_WRITE_TO_RO = BIT(24), /* don't write to read
only registers */
/* ap->flags bits */
@ -264,22 +266,22 @@ enum {
EM_MAX_RETRY = 5,
/* em_ctl bits */
EM_CTL_RST = (1 << 9), /* Reset */
EM_CTL_TM = (1 << 8), /* Transmit Message */
EM_CTL_MR = (1 << 0), /* Message Received */
EM_CTL_ALHD = (1 << 26), /* Activity LED */
EM_CTL_XMT = (1 << 25), /* Transmit Only */
EM_CTL_SMB = (1 << 24), /* Single Message Buffer */
EM_CTL_SGPIO = (1 << 19), /* SGPIO messages supported */
EM_CTL_SES = (1 << 18), /* SES-2 messages supported */
EM_CTL_SAFTE = (1 << 17), /* SAF-TE messages supported */
EM_CTL_LED = (1 << 16), /* LED messages supported */
EM_CTL_RST = BIT(9), /* Reset */
EM_CTL_TM = BIT(8), /* Transmit Message */
EM_CTL_MR = BIT(0), /* Message Received */
EM_CTL_ALHD = BIT(26), /* Activity LED */
EM_CTL_XMT = BIT(25), /* Transmit Only */
EM_CTL_SMB = BIT(24), /* Single Message Buffer */
EM_CTL_SGPIO = BIT(19), /* SGPIO messages supported */
EM_CTL_SES = BIT(18), /* SES-2 messages supported */
EM_CTL_SAFTE = BIT(17), /* SAF-TE messages supported */
EM_CTL_LED = BIT(16), /* LED messages supported */
/* em message type */
EM_MSG_TYPE_LED = (1 << 0), /* LED */
EM_MSG_TYPE_SAFTE = (1 << 1), /* SAF-TE */
EM_MSG_TYPE_SES2 = (1 << 2), /* SES-2 */
EM_MSG_TYPE_SGPIO = (1 << 3), /* SGPIO */
EM_MSG_TYPE_LED = BIT(0), /* LED */
EM_MSG_TYPE_SAFTE = BIT(1), /* SAF-TE */
EM_MSG_TYPE_SES2 = BIT(2), /* SES-2 */
EM_MSG_TYPE_SGPIO = BIT(3), /* SGPIO */
};
struct ahci_cmd_hdr {

69
drivers/base/driver.c
View File

@ -31,6 +31,75 @@ static struct device *next_device(struct klist_iter *i)
return dev;
}
/**
* driver_set_override() - Helper to set or clear driver override.
* @dev: Device to change
* @override: Address of string to change (e.g. &device->driver_override);
* The contents will be freed and hold newly allocated override.
* @s: NUL-terminated string, new driver name to force a match, pass empty
* string to clear it ("" or "\n", where the latter is only for sysfs
* interface).
* @len: length of @s
*
* Helper to set or clear driver override in a device, intended for the cases
* when the driver_override field is allocated by driver/bus code.
*
* Returns: 0 on success or a negative error code on failure.
*/
int driver_set_override(struct device *dev, const char **override,
const char *s, size_t len)
{
const char *new, *old;
char *cp;
if (!override || !s)
return -EINVAL;
/*
* The stored value will be used in sysfs show callback (sysfs_emit()),
* which has a length limit of PAGE_SIZE and adds a trailing newline.
* Thus we can store one character less to avoid truncation during sysfs
* show.
*/
if (len >= (PAGE_SIZE - 1))
return -EINVAL;
if (!len) {
/* Empty string passed - clear override */
device_lock(dev);
old = *override;
*override = NULL;
device_unlock(dev);
kfree(old);
return 0;
}
cp = strnchr(s, len, '\n');
if (cp)
len = cp - s;
new = kstrndup(s, len, GFP_KERNEL);
if (!new)
return -ENOMEM;
device_lock(dev);
old = *override;
if (cp != s) {
*override = new;
} else {
/* "\n" passed - clear override */
kfree(new);
*override = NULL;
}
device_unlock(dev);
kfree(old);
return 0;
}
EXPORT_SYMBOL_GPL(driver_set_override);
/**
* driver_for_each_device - Iterator for devices bound to a driver.
* @drv: Driver we're iterating.

28
drivers/base/platform.c
View File

@ -873,31 +873,11 @@ static ssize_t driver_override_store(struct device *dev,
const char *buf, size_t count)
{
struct platform_device *pdev = to_platform_device(dev);
char *driver_override, *old, *cp;
int ret;
/* We need to keep extra room for a newline */
if (count >= (PAGE_SIZE - 1))
return -EINVAL;
driver_override = kstrndup(buf, count, GFP_KERNEL);
if (!driver_override)
return -ENOMEM;
cp = strchr(driver_override, '\n');
if (cp)
*cp = '\0';
device_lock(dev);
old = pdev->driver_override;
if (strlen(driver_override)) {
pdev->driver_override = driver_override;
} else {
kfree(driver_override);
pdev->driver_override = NULL;
}
device_unlock(dev);
kfree(old);
ret = driver_set_override(dev, &pdev->driver_override, buf, count);
if (ret)
return ret;
return count;
}

9
drivers/block/Kconfig
View File

@ -303,15 +303,6 @@ config BLK_DEV_SKD
Use device /dev/skd$N amd /dev/skd$Np$M.
config BLK_DEV_SX8
tristate "Promise SATA SX8 support"
depends on PCI
---help---
Saying Y or M here will enable support for the
Promise SATA SX8 controllers.
Use devices /dev/sx8/$N and /dev/sx8/$Np$M.
config BLK_DEV_RAM
tristate "RAM block device support"
select DAX if BLK_DEV_RAM_DAX

2
drivers/block/Makefile
View File

@ -27,8 +27,6 @@ obj-$(CONFIG_BLK_DEV_NBD) += nbd.o
obj-$(CONFIG_BLK_DEV_CRYPTOLOOP) += cryptoloop.o
obj-$(CONFIG_VIRTIO_BLK) += virtio_blk.o
obj-$(CONFIG_BLK_DEV_SX8) += sx8.o
obj-$(CONFIG_XEN_BLKDEV_FRONTEND) += xen-blkfront.o
obj-$(CONFIG_XEN_BLKDEV_BACKEND) += xen-blkback/
obj-$(CONFIG_BLK_DEV_DRBD) += drbd/

1746
drivers/block/sx8.c
View File

File diff suppressed because it is too large Load Diff

1
drivers/dma/ste_dma40.c
View File

@ -3678,6 +3678,7 @@ static int __init d40_probe(struct platform_device *pdev)
regulator_disable(base->lcpa_regulator);
regulator_put(base->lcpa_regulator);
}
pm_runtime_disable(base->dev);
kfree(base->lcla_pool.alloc_map);
kfree(base->lookup_log_chans);

6
drivers/gpu/drm/drm_dp_mst_topology.c
View File

@ -1268,14 +1268,14 @@ static struct drm_dp_mst_branch *get_mst_branch_device_by_guid_helper(
struct drm_dp_mst_branch *found_mstb;
struct drm_dp_mst_port *port;
if (!mstb)
return NULL;
if (memcmp(mstb->guid, guid, 16) == 0)
return mstb;
list_for_each_entry(port, &mstb->ports, next) {
if (!port->mstb)
continue;
found_mstb = get_mst_branch_device_by_guid_helper(port->mstb, guid);
if (found_mstb)

2
drivers/i2c/muxes/i2c-demux-pinctrl.c
View File

@ -63,7 +63,7 @@ static int i2c_demux_activate_master(struct i2c_demux_pinctrl_priv *priv, u32 ne
if (ret)
goto err;
adap = of_find_i2c_adapter_by_node(priv->chan[new_chan].parent_np);
adap = of_get_i2c_adapter_by_node(priv->chan[new_chan].parent_np);
if (!adap) {
ret = -ENODEV;
goto err_with_revert;

2
drivers/i2c/muxes/i2c-mux-gpmux.c
View File

@ -55,7 +55,7 @@ static struct i2c_adapter *mux_parent_adapter(struct device *dev)
dev_err(dev, "Cannot parse i2c-parent\n");
return ERR_PTR(-ENODEV);
}
parent = of_find_i2c_adapter_by_node(parent_np);
parent = of_get_i2c_adapter_by_node(parent_np);
of_node_put(parent_np);
if (!parent)
return ERR_PTR(-EPROBE_DEFER);

2
drivers/i2c/muxes/i2c-mux-pinctrl.c
View File

@ -73,7 +73,7 @@ static struct i2c_adapter *i2c_mux_pinctrl_parent_adapter(struct device *dev)
dev_err(dev, "Cannot parse i2c-parent\n");
return ERR_PTR(-ENODEV);
}
parent = of_find_i2c_adapter_by_node(parent_np);
parent = of_get_i2c_adapter_by_node(parent_np);
of_node_put(parent_np);
if (!parent)
return ERR_PTR(-EPROBE_DEFER);

1
drivers/input/mouse/synaptics.c
View File

@ -1735,6 +1735,7 @@ static int synaptics_create_intertouch(struct psmouse *psmouse,
psmouse_matches_pnp_id(psmouse, topbuttonpad_pnp_ids) &&
!SYN_CAP_EXT_BUTTONS_STICK(info->ext_cap_10);
const struct rmi_device_platform_data pdata = {
.reset_delay_ms = 30,
.sensor_pdata = {
.sensor_type = rmi_sensor_touchpad,
.axis_align.flip_y = true,

50
drivers/input/rmi4/rmi_smbus.c
View File

@ -238,12 +238,29 @@ static void rmi_smb_clear_state(struct rmi_smb_xport *rmi_smb)
static int rmi_smb_enable_smbus_mode(struct rmi_smb_xport *rmi_smb)
{
int retval;
struct i2c_client *client = rmi_smb->client;
int smbus_version;
/*
* psmouse driver resets the controller, we only need to wait
* to give the firmware chance to fully reinitialize.
*/
if (rmi_smb->xport.pdata.reset_delay_ms)
msleep(rmi_smb->xport.pdata.reset_delay_ms);
/* we need to get the smbus version to activate the touchpad */
retval = rmi_smb_get_version(rmi_smb);
if (retval < 0)
return retval;
smbus_version = rmi_smb_get_version(rmi_smb);
if (smbus_version < 0)
return smbus_version;
rmi_dbg(RMI_DEBUG_XPORT, &client->dev, "Smbus version is %d",
smbus_version);
if (smbus_version != 2 && smbus_version != 3) {
dev_err(&client->dev, "Unrecognized SMB version %d\n",
smbus_version);
return -ENODEV;
}
return 0;
}
@ -256,11 +273,10 @@ static int rmi_smb_reset(struct rmi_transport_dev *xport, u16 reset_addr)
rmi_smb_clear_state(rmi_smb);
/*
* we do not call the actual reset command, it has to be handled in
* PS/2 or there will be races between PS/2 and SMBus.
* PS/2 should ensure that a psmouse_reset is called before
* intializing the device and after it has been removed to be in a known
* state.
* We do not call the actual reset command, it has to be handled in
* PS/2 or there will be races between PS/2 and SMBus. PS/2 should
* ensure that a psmouse_reset is called before initializing the
* device and after it has been removed to be in a known state.
*/
return rmi_smb_enable_smbus_mode(rmi_smb);
}
@ -276,7 +292,6 @@ static int rmi_smb_probe(struct i2c_client *client,
{
struct rmi_device_platform_data *pdata = dev_get_platdata(&client->dev);
struct rmi_smb_xport *rmi_smb;
int smbus_version;
int error;
if (!pdata) {
@ -315,18 +330,9 @@ static int rmi_smb_probe(struct i2c_client *client,
rmi_smb->xport.proto_name = "smb";
rmi_smb->xport.ops = &rmi_smb_ops;
smbus_version = rmi_smb_get_version(rmi_smb);
if (smbus_version < 0)
return smbus_version;
rmi_dbg(RMI_DEBUG_XPORT, &client->dev, "Smbus version is %d",
smbus_version);
if (smbus_version != 2 && smbus_version != 3) {
dev_err(&client->dev, "Unrecognized SMB version %d\n",
smbus_version);
return -ENODEV;
}
error = rmi_smb_enable_smbus_mode(rmi_smb);
if (error)
return error;
i2c_set_clientdata(client, rmi_smb);

1
drivers/irqchip/irq-stm32-exti.c
View File

@ -127,6 +127,7 @@ struct irq_domain_ops irq_exti_domain_ops = {
.xlate = irq_domain_xlate_onetwocell,
.alloc = stm32_exti_alloc,
.free = stm32_exti_free,
.xlate = irq_domain_xlate_twocell,
};
static int __init stm32_exti_init(struct device_node *node,

35
drivers/mcb/mcb-lpc.c
View File

@ -26,7 +26,7 @@ static int mcb_lpc_probe(struct platform_device *pdev)
{
struct resource *res;
struct priv *priv;
int ret = 0;
int ret = 0, table_size;
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
@ -61,16 +61,43 @@ static int mcb_lpc_probe(struct platform_device *pdev)
ret = chameleon_parse_cells(priv->bus, priv->mem->start, priv->base);
if (ret < 0) {
mcb_release_bus(priv->bus);
return ret;
goto out_mcb_bus;
}
dev_dbg(&pdev->dev, "Found %d cells\n", ret);
table_size = ret;
if (table_size < CHAM_HEADER_SIZE) {
/* Release the previous resources */
devm_iounmap(&pdev->dev, priv->base);
devm_release_mem_region(&pdev->dev, priv->mem->start, resource_size(priv->mem));
/* Then, allocate it again with the actual chameleon table size */
res = devm_request_mem_region(&pdev->dev, priv->mem->start,
table_size,
KBUILD_MODNAME);
if (!res) {
dev_err(&pdev->dev, "Failed to request PCI memory\n");
ret = -EBUSY;
goto out_mcb_bus;
}
priv->base = devm_ioremap(&pdev->dev, priv->mem->start, table_size);
if (!priv->base) {
dev_err(&pdev->dev, "Cannot ioremap\n");
ret = -ENOMEM;
goto out_mcb_bus;
}
platform_set_drvdata(pdev, priv);
}
mcb_bus_add_devices(priv->bus);
return 0;
out_mcb_bus:
mcb_release_bus(priv->bus);
return ret;
}
static int mcb_lpc_remove(struct platform_device *pdev)

15
drivers/mcb/mcb-parse.c
View File

@ -127,7 +127,7 @@ static void chameleon_parse_bar(void __iomem *base,
}
}
static int chameleon_get_bar(char __iomem **base, phys_addr_t mapbase,
static int chameleon_get_bar(void __iomem **base, phys_addr_t mapbase,
struct chameleon_bar **cb)
{
struct chameleon_bar *c;
@ -176,12 +176,13 @@ int chameleon_parse_cells(struct mcb_bus *bus, phys_addr_t mapbase,
{
struct chameleon_fpga_header *header;
struct chameleon_bar *cb;
char __iomem *p = base;
void __iomem *p = base;
int num_cells = 0;
uint32_t dtype;
int bar_count;
int ret;
u32 hsize;
u32 table_size;
hsize = sizeof(struct chameleon_fpga_header);
@ -236,12 +237,16 @@ int chameleon_parse_cells(struct mcb_bus *bus, phys_addr_t mapbase,
num_cells++;
}
if (num_cells == 0)
num_cells = -EINVAL;
if (num_cells == 0) {
ret = -EINVAL;
goto free_bar;
}
table_size = p - base;
pr_debug("%d cell(s) found. Chameleon table size: 0x%04x bytes\n", num_cells, table_size);
kfree(cb);
kfree(header);
return num_cells;
return table_size;
free_bar:
kfree(cb);

2
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
View File

@ -3710,6 +3710,8 @@ int t4_load_phy_fw(struct adapter *adap,
FW_PARAMS_PARAM_Z_V(FW_PARAMS_PARAM_DEV_PHYFW_DOWNLOAD));
ret = t4_set_params_timeout(adap, adap->mbox, adap->pf, 0, 1,
&param, &val, 30000);
if (ret)
return ret;
/* If we have version number support, then check to see that the new
* firmware got loaded properly.

2
drivers/net/ethernet/intel/i40e/i40e_txrx.c
View File

@ -2401,7 +2401,7 @@ tx_only:
return budget;
}
if (vsi->back->flags & I40E_TXR_FLAGS_WB_ON_ITR)
if (q_vector->tx.ring[0].flags & I40E_TXR_FLAGS_WB_ON_ITR)
q_vector->arm_wb_state = false;
/* Work is done so exit the polling mode and re-enable the interrupt */

6
drivers/net/ethernet/intel/igb/igb_ethtool.c
View File

@ -2951,11 +2951,15 @@ static int igb_add_ethtool_nfc_entry(struct igb_adapter *adapter,
if (err)
goto err_out_w_lock;
igb_update_ethtool_nfc_entry(adapter, input, input->sw_idx);
err = igb_update_ethtool_nfc_entry(adapter, input, input->sw_idx);
if (err)
goto err_out_input_filter;
spin_unlock(&adapter->nfc_lock);
return 0;
err_out_input_filter:
igb_erase_filter(adapter, input);
err_out_w_lock:
spin_unlock(&adapter->nfc_lock);
err_out:

2
drivers/net/ethernet/toshiba/ps3_gelic_wireless.c
View File

@ -1232,7 +1232,7 @@ static int gelic_wl_set_encodeext(struct net_device *netdev,
key_index = wl->current_key;
if (!enc->length && (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY)) {
/* reques to change default key index */
/* request to change default key index */
pr_debug("%s: request to change default key to %d\n",
__func__, key_index);
wl->current_key = key_index;

7
drivers/net/usb/r8152.c
View File

@ -786,7 +786,7 @@ int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
value, index, tmp, size, 500);
value, index, tmp, size, USB_CTRL_GET_TIMEOUT);
if (ret < 0)
memset(data, 0xff, size);
else
@ -809,7 +809,7 @@ int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
value, index, tmp, size, 500);
value, index, tmp, size, USB_CTRL_SET_TIMEOUT);
kfree(tmp);
@ -5084,7 +5084,8 @@ static u8 rtl_get_version(struct usb_interface *intf)
ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
PLA_TCR0, MCU_TYPE_PLA, tmp, sizeof(*tmp), 500);
PLA_TCR0, MCU_TYPE_PLA, tmp, sizeof(*tmp),
USB_CTRL_GET_TIMEOUT);
if (ret > 0)
ocp_data = (__le32_to_cpu(*tmp) >> 16) & VERSION_MASK;

9
drivers/pci/quirks.c
View File

@ -429,14 +429,15 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS100, quirk_ati_
/*
* In the AMD NL platform, this device ([1022:7912]) has a class code of
* PCI_CLASS_SERIAL_USB_XHCI (0x0c0330), which means the xhci driver will
* claim it.
* claim it. The same applies on the VanGogh platform device ([1022:163a]).
*
* But the dwc3 driver is a more specific driver for this device, and we'd
* prefer to use it instead of xhci. To prevent xhci from claiming the
* device, change the class code to 0x0c03fe, which the PCI r3.0 spec
* defines as "USB device (not host controller)". The dwc3 driver can then
* claim it based on its Vendor and Device ID.
*/
static void quirk_amd_nl_class(struct pci_dev *pdev)
static void quirk_amd_dwc_class(struct pci_dev *pdev)
{
u32 class = pdev->class;
@ -446,7 +447,9 @@ static void quirk_amd_nl_class(struct pci_dev *pdev)
class, pdev->class);
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB,
quirk_amd_nl_class);
quirk_amd_dwc_class);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VANGOGH_USB,
quirk_amd_dwc_class);
/*
* Let's make the southbridge information explicit instead

2
drivers/platform/x86/asus-wmi.h
View File

@ -31,7 +31,7 @@
#include <linux/i8042.h>
#define ASUS_WMI_KEY_IGNORE (-1)
#define ASUS_WMI_BRN_DOWN 0x20
#define ASUS_WMI_BRN_DOWN 0x2e
#define ASUS_WMI_BRN_UP 0x2f
struct module;

1
drivers/rpmsg/qcom_glink_native.c
View File

@ -1354,6 +1354,7 @@ static void qcom_glink_rpdev_release(struct device *dev)
struct glink_channel *channel = to_glink_channel(rpdev->ept);
channel->rpdev = NULL;
kfree(rpdev->driver_override);
kfree(rpdev);
}

34
drivers/rpmsg/rpmsg_core.c
View File

@ -474,24 +474,52 @@ static struct bus_type rpmsg_bus = {
.remove = rpmsg_dev_remove,
};
int rpmsg_register_device(struct rpmsg_device *rpdev)
/*
* A helper for registering rpmsg device with driver override and name.
* Drivers should not be using it, but instead rpmsg_register_device().
*/
int rpmsg_register_device_override(struct rpmsg_device *rpdev,
const char *driver_override)
{
struct device *dev = &rpdev->dev;
int ret;
if (driver_override)
strcpy(rpdev->id.name, driver_override);
dev_set_name(&rpdev->dev, "%s.%s.%d.%d", dev_name(dev->parent),
rpdev->id.name, rpdev->src, rpdev->dst);
rpdev->dev.bus = &rpmsg_bus;
ret = device_register(&rpdev->dev);
device_initialize(dev);
if (driver_override) {
ret = driver_set_override(dev, &rpdev->driver_override,
driver_override,
strlen(driver_override));
if (ret) {
dev_err(dev, "device_set_override failed: %d\n", ret);
put_device(dev);
return ret;
}
}
ret = device_add(dev);
if (ret) {
dev_err(dev, "device_register failed: %d\n", ret);
dev_err(dev, "device_add failed: %d\n", ret);
kfree(rpdev->driver_override);
rpdev->driver_override = NULL;
put_device(&rpdev->dev);
}
return ret;
}
EXPORT_SYMBOL(rpmsg_register_device_override);
int rpmsg_register_device(struct rpmsg_device *rpdev)
{
return rpmsg_register_device_override(rpdev, NULL);
}
EXPORT_SYMBOL(rpmsg_register_device);
/*

5
drivers/rpmsg/rpmsg_internal.h
View File

@ -91,10 +91,7 @@ struct device *rpmsg_find_device(struct device *parent,
*/
static inline int rpmsg_chrdev_register_device(struct rpmsg_device *rpdev)
{
strcpy(rpdev->id.name, "rpmsg_chrdev");
rpdev->driver_override = "rpmsg_chrdev";
return rpmsg_register_device(rpdev);
return rpmsg_register_device_override(rpdev, "rpmsg_ctrl");
}
#endif

4
drivers/scsi/mpt3sas/mpt3sas_scsih.c
View File

@ -9482,8 +9482,10 @@ _mpt3sas_init(void)
mpt3sas_ctl_init(hbas_to_enumerate);
error = pci_register_driver(&mpt3sas_driver);
if (error)
if (error) {
mpt3sas_ctl_exit(hbas_to_enumerate);
scsih_exit();
}
return error;
}

122
drivers/tty/serial/8250/8250_pci.c
View File

@ -4782,6 +4782,12 @@ static const struct pci_device_id serial_pci_tbl[] = {
0, 0,
pbn_b1_bt_1_115200 },
/*
* IntaShield IS-100
*/
{ PCI_VENDOR_ID_INTASHIELD, 0x0D60,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,
pbn_b2_1_115200 },
/*
* IntaShield IS-200
*/
@ -4809,10 +4815,14 @@ static const struct pci_device_id serial_pci_tbl[] = {
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_1_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x0AA2,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_1_115200 },
/*
* Brainboxes UC-257
* Brainboxes UC-253/UC-734
*/
{ PCI_VENDOR_ID_INTASHIELD, 0x0861,
{ PCI_VENDOR_ID_INTASHIELD, 0x0CA1,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
@ -4848,6 +4858,14 @@ static const struct pci_device_id serial_pci_tbl[] = {
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x08E2,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x08E3,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
/*
* Brainboxes UC-310
*/
@ -4858,6 +4876,14 @@ static const struct pci_device_id serial_pci_tbl[] = {
/*
* Brainboxes UC-313
*/
{ PCI_VENDOR_ID_INTASHIELD, 0x08A1,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x08A2,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x08A3,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
@ -4872,6 +4898,10 @@ static const struct pci_device_id serial_pci_tbl[] = {
/*
* Brainboxes UC-346
*/
{ PCI_VENDOR_ID_INTASHIELD, 0x0B01,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_4_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x0B02,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
@ -4883,6 +4913,10 @@ static const struct pci_device_id serial_pci_tbl[] = {
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x0A82,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x0A83,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
@ -4895,12 +4929,94 @@ static const struct pci_device_id serial_pci_tbl[] = {
0, 0,
pbn_b2_4_115200 },
/*
* Brainboxes UC-420/431
* Brainboxes UC-420
*/
{ PCI_VENDOR_ID_INTASHIELD, 0x0921,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_4_115200 },
/*
* Brainboxes UC-607
*/
{ PCI_VENDOR_ID_INTASHIELD, 0x09A1,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x09A2,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x09A3,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
/*
* Brainboxes UC-836
*/
{ PCI_VENDOR_ID_INTASHIELD, 0x0D41,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_4_115200 },
/*
* Brainboxes UP-189
*/
{ PCI_VENDOR_ID_INTASHIELD, 0x0AC1,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x0AC2,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x0AC3,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
/*
* Brainboxes UP-200
*/
{ PCI_VENDOR_ID_INTASHIELD, 0x0B21,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x0B22,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x0B23,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
/*
* Brainboxes UP-869
*/
{ PCI_VENDOR_ID_INTASHIELD, 0x0C01,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x0C02,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x0C03,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
/*
* Brainboxes UP-880
*/
{ PCI_VENDOR_ID_INTASHIELD, 0x0C21,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x0C22,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
{ PCI_VENDOR_ID_INTASHIELD, 0x0C23,
PCI_ANY_ID, PCI_ANY_ID,
0, 0,
pbn_b2_2_115200 },
/*
* Perle PCI-RAS cards
*/

9
drivers/tty/vt/vc_screen.c
View File

@ -219,10 +219,6 @@ vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)
console_lock();
attr = (currcons & 128);
ret = -ENXIO;
vc = vcs_vc(inode, &viewed);
if (!vc)
goto unlock_out;
ret = -EINVAL;
if (pos < 0)
@ -238,6 +234,11 @@ vcs_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)
ssize_t orig_count;
long p = pos;
ret = -ENXIO;
vc = vcs_vc(inode, &viewed);
if (!vc)
goto unlock_out;
/* Check whether we are above size each round,
* as copy_to_user at the end of this loop
* could sleep.

2
drivers/usb/storage/unusual_cypress.h
View File

@ -32,7 +32,7 @@ UNUSUAL_DEV( 0x04b4, 0x6831, 0x0000, 0x9999,
"Cypress ISD-300LP",
USB_SC_CYP_ATACB, USB_PR_DEVICE, NULL, 0),
UNUSUAL_DEV( 0x14cd, 0x6116, 0x0160, 0x0160,
UNUSUAL_DEV( 0x14cd, 0x6116, 0x0150, 0x0160,
"Super Top",
"USB 2.0 SATA BRIDGE",
USB_SC_CYP_ATACB, USB_PR_DEVICE, NULL, 0),

4
drivers/video/fbdev/aty/atyfb_base.c
View File

@ -3435,11 +3435,15 @@ static int atyfb_setup_generic(struct pci_dev *pdev, struct fb_info *info,
}
info->fix.mmio_start = raddr;
#if defined(__i386__) || defined(__ia64__)
/*
* By using strong UC we force the MTRR to never have an
* effect on the MMIO region on both non-PAT and PAT systems.
*/
par->ati_regbase = ioremap_uc(info->fix.mmio_start, 0x1000);
#else
par->ati_regbase = ioremap(info->fix.mmio_start, 0x1000);
#endif
if (par->ati_regbase == NULL)
return -ENOMEM;

2
drivers/video/fbdev/uvesafb.c
View File

@ -1931,10 +1931,10 @@ static void uvesafb_exit(void)
}
}
cn_del_callback(&uvesafb_cn_id);
driver_remove_file(&uvesafb_driver.driver, &driver_attr_v86d);
platform_device_unregister(uvesafb_device);
platform_driver_unregister(&uvesafb_driver);
cn_del_callback(&uvesafb_cn_id);
}
module_exit(uvesafb_exit);

6
drivers/virtio/virtio_balloon.c
View File

@ -341,7 +341,11 @@ static inline s64 towards_target(struct virtio_balloon *vb)
if (!virtio_has_feature(vb->vdev, VIRTIO_F_VERSION_1))
num_pages = le32_to_cpu((__force __le32)num_pages);
target = num_pages;
/*
* Aligned up to guest page size to avoid inflating and deflating
* balloon endlessly.
*/
target = ALIGN(num_pages, VIRTIO_BALLOON_PAGES_PER_PAGE);
return target - vb->num_pages;
}

3
fs/f2fs/gc.c
View File

@ -1066,7 +1066,8 @@ next_step:
if (phase == 3) {
inode = f2fs_iget(sb, dni.ino);
if (IS_ERR(inode) || is_bad_inode(inode)) {
if (IS_ERR(inode) || is_bad_inode(inode) ||
special_file(inode->i_mode)) {
set_sbi_flag(sbi, SBI_NEED_FSCK);
continue;
}

3
fs/nfs/write.c
View File

@ -587,9 +587,8 @@ try_again:
static void nfs_write_error_remove_page(struct nfs_page *req)
{
SetPageError(req->wb_page);
nfs_end_page_writeback(req);
generic_error_remove_page(page_file_mapping(req->wb_page),
req->wb_page);
nfs_release_request(req);
}

12
fs/nfsd/vfs.c
View File

@ -1665,6 +1665,12 @@ nfsd_rename(struct svc_rqst *rqstp, struct svc_fh *ffhp, char *fname, int flen,
if (!flen || isdotent(fname, flen) || !tlen || isdotent(tname, tlen))
goto out;
err = (rqstp->rq_vers == 2) ? nfserr_acces : nfserr_xdev;
if (ffhp->fh_export->ex_path.mnt != tfhp->fh_export->ex_path.mnt)
goto out;
if (ffhp->fh_export->ex_path.dentry != tfhp->fh_export->ex_path.dentry)
goto out;
host_err = fh_want_write(ffhp);
if (host_err) {
err = nfserrno(host_err);
@ -1698,12 +1704,6 @@ nfsd_rename(struct svc_rqst *rqstp, struct svc_fh *ffhp, char *fname, int flen,
if (ndentry == trap)
goto out_dput_new;
host_err = -EXDEV;
if (ffhp->fh_export->ex_path.mnt != tfhp->fh_export->ex_path.mnt)
goto out_dput_new;
if (ffhp->fh_export->ex_path.dentry != tfhp->fh_export->ex_path.dentry)
goto out_dput_new;
host_err = vfs_rename(fdir, odentry, tdir, ndentry, NULL, 0);
if (!host_err) {
host_err = commit_metadata(tfhp);

2
include/linux/device.h
View File

@ -319,6 +319,8 @@ extern int __must_check driver_create_file(struct device_driver *driver,
extern void driver_remove_file(struct device_driver *driver,
const struct driver_attribute *attr);
int driver_set_override(struct device *dev, const char **override,
const char *s, size_t len);
extern int __must_check driver_for_each_device(struct device_driver *drv,
struct device *start,
void *data,

1
include/linux/pci_ids.h
View File

@ -541,6 +541,7 @@
#define PCI_DEVICE_ID_AMD_16H_NB_F4 0x1534
#define PCI_DEVICE_ID_AMD_16H_M30H_NB_F3 0x1583
#define PCI_DEVICE_ID_AMD_16H_M30H_NB_F4 0x1584
#define PCI_DEVICE_ID_AMD_VANGOGH_USB 0x163a
#define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703
#define PCI_DEVICE_ID_AMD_LANCE 0x2000
#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001

6
include/linux/platform_device.h
View File

@ -29,7 +29,11 @@ struct platform_device {
struct resource *resource;
const struct platform_device_id *id_entry;
char *driver_override; /* Driver name to force a match */
/*
* Driver name to force a match. Do not set directly, because core
* frees it. Use driver_set_override() to set or clear it.
*/
const char *driver_override;
/* MFD cell pointer */
struct mfd_cell *mfd_cell;

14
include/linux/rpmsg.h
View File

@ -66,7 +66,9 @@ struct rpmsg_channel_info {
* rpmsg_device - device that belong to the rpmsg bus
* @dev: the device struct
* @id: device id (used to match between rpmsg drivers and devices)
* @driver_override: driver name to force a match
* @driver_override: driver name to force a match; do not set directly,
* because core frees it; use driver_set_override() to
* set or clear it.
* @src: local address
* @dst: destination address
* @ept: the rpmsg endpoint of this channel
@ -75,7 +77,7 @@ struct rpmsg_channel_info {
struct rpmsg_device {
struct device dev;
struct rpmsg_device_id id;
char *driver_override;
const char *driver_override;
u32 src;
u32 dst;
struct rpmsg_endpoint *ept;
@ -138,6 +140,8 @@ struct rpmsg_driver {
#if IS_ENABLED(CONFIG_RPMSG)
int rpmsg_register_device_override(struct rpmsg_device *rpdev,
const char *driver_override);
int register_rpmsg_device(struct rpmsg_device *dev);
void unregister_rpmsg_device(struct rpmsg_device *dev);
int __register_rpmsg_driver(struct rpmsg_driver *drv, struct module *owner);
@ -162,6 +166,12 @@ unsigned int rpmsg_poll(struct rpmsg_endpoint *ept, struct file *filp,
#else
static inline int rpmsg_register_device_override(struct rpmsg_device *rpdev,
const char *driver_override)
{
return -ENXIO;
}
static inline int register_rpmsg_device(struct rpmsg_device *dev)
{
return -ENXIO;

2
include/uapi/linux/gtp.h
View File

@ -30,6 +30,6 @@ enum gtp_attrs {
GTPA_PAD,
__GTPA_MAX,
};
#define GTPA_MAX (__GTPA_MAX + 1)
#define GTPA_MAX (__GTPA_MAX - 1)
#endif /* _UAPI_LINUX_GTP_H_ */

3
kernel/events/core.c
View File

@ -11120,7 +11120,8 @@ static int inherit_group(struct perf_event *parent_event,
if (IS_ERR(child_ctr))
return PTR_ERR(child_ctr);
}
leader->group_generation = parent_event->group_generation;
if (leader)
leader->group_generation = parent_event->group_generation;
return 0;
}

12
lib/kobject.c
View File

@ -118,7 +118,7 @@ static int get_kobj_path_length(struct kobject *kobj)
return length;
}
static void fill_kobj_path(struct kobject *kobj, char *path, int length)
static int fill_kobj_path(struct kobject *kobj, char *path, int length)
{
struct kobject *parent;
@ -127,12 +127,16 @@ static void fill_kobj_path(struct kobject *kobj, char *path, int length)
int cur = strlen(kobject_name(parent));
/* back up enough to print this name with '/' */
length -= cur;
if (length <= 0)
return -EINVAL;
memcpy(path + length, kobject_name(parent), cur);
*(path + --length) = '/';
}
pr_debug("kobject: '%s' (%p): %s: path = '%s'\n", kobject_name(kobj),
kobj, __func__, path);
return 0;
}
/**
@ -148,13 +152,17 @@ char *kobject_get_path(struct kobject *kobj, gfp_t gfp_mask)
char *path;
int len;
retry:
len = get_kobj_path_length(kobj);
if (len == 0)
return NULL;
path = kzalloc(len, gfp_mask);
if (!path)
return NULL;
fill_kobj_path(kobj, path, len);
if (fill_kobj_path(kobj, path, len)) {
kfree(path);
goto retry;
}
return path;
}

9
net/ipv4/tcp_input.c
View File

@ -2069,16 +2069,17 @@ void tcp_enter_loss(struct sock *sk)
* restore sanity to the SACK scoreboard. If the apparent reneging
* persists until this RTO then we'll clear the SACK scoreboard.
*/
static bool tcp_check_sack_reneging(struct sock *sk, int flag)
static bool tcp_check_sack_reneging(struct sock *sk, int *ack_flag)
{
if (flag & FLAG_SACK_RENEGING &&
flag & FLAG_SND_UNA_ADVANCED) {
if (*ack_flag & FLAG_SACK_RENEGING &&
*ack_flag & FLAG_SND_UNA_ADVANCED) {
struct tcp_sock *tp = tcp_sk(sk);
unsigned long delay = max(usecs_to_jiffies(tp->srtt_us >> 4),
msecs_to_jiffies(10));
inet_csk_reset_xmit_timer(sk, ICSK_TIME_RETRANS,
delay, TCP_RTO_MAX);
*ack_flag &= ~FLAG_SET_XMIT_TIMER;
return true;
}
return false;
@ -2870,7 +2871,7 @@ static void tcp_fastretrans_alert(struct sock *sk, const int acked,
tp->prior_ssthresh = 0;
/* B. In all the states check for reneging SACKs. */
if (tcp_check_sack_reneging(sk, flag))
if (tcp_check_sack_reneging(sk, ack_flag))
return;
/* C. Check consistency of the current state. */

2
net/netfilter/nfnetlink_log.c
View File

@ -637,8 +637,8 @@ nfulnl_log_packet(struct net *net,
unsigned int plen;
struct nfnl_log_net *log = nfnl_log_pernet(net);
const struct nfnl_ct_hook *nfnl_ct = NULL;
enum ip_conntrack_info ctinfo = 0;
struct nf_conn *ct = NULL;
enum ip_conntrack_info ctinfo;
if (li_user && li_user->type == NF_LOG_TYPE_ULOG)
li = li_user;

2
sound/soc/codecs/rt5645.c
View File

@ -3220,6 +3220,8 @@ int rt5645_set_jack_detect(struct snd_soc_codec *codec,
RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL1,
RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
regmap_update_bits(rt5645->regmap, RT5645_DEPOP_M1,
RT5645_HP_CB_MASK, RT5645_HP_CB_PU);
}
rt5645_irq(0, rt5645);

6
sound/soc/generic/simple-card.c
View File

@ -441,10 +441,12 @@ static int asoc_simple_card_probe(struct platform_device *pdev)
} else {
struct asoc_simple_card_info *cinfo;
ret = -EINVAL;
cinfo = dev->platform_data;
if (!cinfo) {
dev_err(dev, "no info for asoc-simple-card\n");
return -EINVAL;
goto err;
}
if (!cinfo->name ||
@ -453,7 +455,7 @@ static int asoc_simple_card_probe(struct platform_device *pdev)
!cinfo->platform ||
!cinfo->cpu_dai.name) {
dev_err(dev, "insufficient asoc_simple_card_info settings\n");
return -EINVAL;
goto err;
}
card->name = (cinfo->card) ? cinfo->card : cinfo->name;