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Merge 5404c814f313ca85455ce93028f8667d00f6cf8c on remote branch

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Change-Id: I701815a8aec2732323f27cbefe2b39091c4045e6
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Linux Build Service Account 2022-08-17 08:32:37 -07:00
commit 48feda7ae9
10 changed files with 4845 additions and 14 deletions
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5
fw/htt.h
View File

@ -747,6 +747,10 @@ typedef enum {
HTT_STATS_DMAC_RESET_STATS_TAG = 155, /* htt_dmac_reset_stats_tlv */
HTT_STATS_RX_PDEV_BE_UL_OFDMA_USER_STATS_TAG = 156, /* htt_rx_pdev_be_ul_ofdma_user_stats_tlv */
HTT_STATS_PHY_TPC_STATS_TAG = 157, /* htt_phy_tpc_stats_tlv */
HTT_STATS_PDEV_PUNCTURE_STATS_TAG = 158, /* htt_pdev_puncture_stats_tlv */
HTT_STATS_ML_PEER_DETAILS_TAG = 159, /* htt_ml_peer_details_tlv */
HTT_STATS_ML_PEER_EXT_DETAILS_TAG = 160, /* htt_ml_peer_ext_details_tlv */
HTT_STATS_ML_LINK_INFO_DETAILS_TAG = 161, /* htt_ml_link_info_tlv */
HTT_STATS_MAX_TAG,
@ -5179,6 +5183,7 @@ enum htt_srng_ring_id {
HTT_RX_MON_HOST2MON_BUF_RING, /* Status buffers and Packet buffers are provided by host */
HTT_RX_MON_MON2HOST_DEST_RING, /* Used by monitor to fill status buffers and provide to host */
HTT_LPASS_TO_FW_RXBUF_RING, /* new LPASS to FW refill ring to recycle rx buffers */
HTT_HOST3_TO_FW_RXBUF_RING, /* used by host for EasyMesh feature */
/* Add Other SRING which can't be directly configured by host software above this line */
};

637
fw/htt_stats.h
View File

@ -442,6 +442,27 @@ enum htt_dbg_ext_stats_type {
*/
HTT_DBG_SOC_ERROR_STATS = 45,
/** HTT_DBG_PDEV_PUNCTURE_STATS
* PARAMS:
* - param 0: enum from htt_tx_pdev_puncture_stats_upload_t, indicating
* the stats to upload
* RESP MSG:
* - one or more htt_pdev_puncture_stats_tlv, depending on param 0
*/
HTT_DBG_PDEV_PUNCTURE_STATS = 46,
/* HTT_DBG_EXT_STATS_ML_PEERS_INFO
* PARAMS:
* - param 0:
* Bit 0 -> HTT_ML_PEER_DETAILS_TLV always enabled by default
* Bit 1 -> HTT_ML_PEER_EXT_DETAILS_TLV will be uploaded when
* this bit is set
* Bit 2 -> HTT_ML_LINK_INFO_TLV will be uploaded when this bit is set
* RESP MSG:
* - htt_ml_peer_stats_t
*/
HTT_DBG_EXT_STATS_ML_PEERS_INFO = 47,
/* keep this last */
HTT_DBG_NUM_EXT_STATS = 256,
@ -593,6 +614,21 @@ typedef enum {
HTT_UPLOAD_BE_TXBF_OFDMA_STATS,
} htt_tx_pdev_txbf_ofdma_stats_upload_t;
/* htt_tx_pdev_puncture_stats_upload_t
* Enumerations for specifying which stats to upload in response to
* HTT_DBG_PDEV_PUNCTURE_STATS.
*/
typedef enum {
/* upload puncture stats for all supported modes, both TX and RX */
HTT_UPLOAD_PUNCTURE_STATS_ALL,
/* upload puncture stats for all supported TX modes */
HTT_UPLOAD_PUNCTURE_STATS_TX,
/* upload puncture stats for all supported RX modes */
HTT_UPLOAD_PUNCTURE_STATS_RX,
} htt_tx_pdev_puncture_stats_upload_t;
#define HTT_STATS_MAX_STRING_SZ32 4
#define HTT_STATS_MACID_INVALID 0xff
#define HTT_TX_HWQ_MAX_DIFS_LATENCY_BINS 10
@ -1318,6 +1354,20 @@ typedef struct _htt_tx_tid_stats_v1_tlv {
* BIT [31 : 16] :- reserved
*/
A_UINT32 sendn_frms_allowed;
/*
* tid_ext_flags, tid_ext2_flags, and tid_flush_reason are opaque fields
* that cannot be interpreted by the host.
* They are only for off-line debug.
*/
A_UINT32 tid_ext_flags;
A_UINT32 tid_ext2_flags;
A_UINT32 tid_flush_reason;
A_UINT32 mlo_flush_tqm_status_pending_low;
A_UINT32 mlo_flush_tqm_status_pending_high;
A_UINT32 mlo_flush_partner_info_low;
A_UINT32 mlo_flush_partner_info_high;
A_UINT32 mlo_flush_initator_info_low;
A_UINT32 mlo_flush_initator_info_high;
} htt_tx_tid_stats_v1_tlv;
#define HTT_RX_TID_STATS_SW_PEER_ID_M 0x0000ffff
@ -1418,6 +1468,24 @@ typedef struct {
A_UINT32 remove_mpdus_max_retries;
} htt_peer_stats_cmn_tlv;
#define HTT_PEER_DETAILS_ML_PEER_OFFSET_BYTES 32
#define HTT_PEER_DETAILS_ML_PEER_OFFSET_DWORD 8
#define HTT_PEER_DETAILS_ML_PEER_ID_VALID_M 0x00000001
#define HTT_PEER_DETAILS_ML_PEER_ID_VALID_S 0
#define HTT_PEER_DETAILS_ML_PEER_ID_M 0x00001ffe
#define HTT_PEER_DETAILS_ML_PEER_ID_S 1
#define HTT_PEER_DETAILS_LINK_IDX_M 0x001fe000
#define HTT_PEER_DETAILS_LINK_IDX_S 13
#define HTT_PEER_DETAILS_SET(word, httsym, val) \
do { \
HTT_CHECK_SET_VAL(HTT_PEER_DETAILS_ ## httsym, val); \
(word) |= ((val) << HTT_PEER_DETAILS_ ## httsym ## _S); \
} while(0)
#define HTT_PEER_DETAILS_GET(word, httsym) \
(((word) & HTT_PEER_DETAILS_ ## httsym ## _M) >> HTT_PEER_DETAILS_ ## httsym ## _S)
typedef struct {
htt_tlv_hdr_t tlv_hdr;
/** This enum type of HTT_PEER_TYPE */
@ -1432,6 +1500,11 @@ typedef struct {
htt_mac_addr mac_addr;
A_UINT32 peer_flags;
A_UINT32 qpeer_flags;
/* Dword 8 */
A_UINT32 ml_peer_id_valid : 1, /* [0:0] */
ml_peer_id : 12, /* [12:1] */
link_idx : 8, /* [20:13] */
rsvd : 11; /* [31:21] */
} htt_peer_details_tlv;
typedef struct {
@ -1451,6 +1524,19 @@ typedef struct {
reserved : 16;
} htt_ast_entry_tlv;
typedef enum {
HTT_STATS_DIRECTION_TX,
HTT_STATS_DIRECTION_RX,
} HTT_STATS_DIRECTION;
typedef enum {
HTT_STATS_PPDU_TYPE_MODE_SU,
HTT_STATS_PPDU_TYPE_DL_MU_MIMO,
HTT_STATS_PPDU_TYPE_UL_MU_MIMO,
HTT_STATS_PPDU_TYPE_DL_MU_OFDMA,
HTT_STATS_PPDU_TYPE_UL_MU_OFDMA,
} HTT_STATS_PPDU_TYPE;
typedef enum {
HTT_STATS_PREAM_OFDM,
HTT_STATS_PREAM_CCK,
@ -3260,6 +3346,17 @@ typedef enum {
HTT_SCHED_TID_FALLBACK_TO_PREV_DECISION, /* Fall back to previous decision */
HTT_SCHED_TID_SKIP_PEER_ALREADY_IN_TXQ, /* skip tid, peer is already available in the txq */
HTT_SCHED_TID_SKIP_DELAY_UL_SCHED, /* skip tid delay UL schedule */
HTT_SCHED_TID_SKIP_PWR_SAVE_STATE_OFF, /* Limit UL scheduling to primary link if not in power save state */
HTT_SCHED_TID_SKIP_TWT_SUSPEND, /* Skip UL trigger for certain cases ex TWT suspend */
HTT_SCHED_TID_SKIP_DISABLE_160MHZ_OFDMA, /* Skip ul tid if peer supports 160MHZ */
HTT_SCHED_TID_SKIP_ULMU_DISABLE_FROM_OMI, /* Skip ul tid if sta send omi to indicate to disable UL mu data */
HTT_SCHED_TID_SKIP_UL_MAX_SCHED_CMD_EXCEEDED,/* skip ul tid if max sched cmd is exceeded */
HTT_SCHED_TID_SKIP_UL_SMALL_QDEPTH, /* Skip ul tid for small qdepth */
HTT_SCHED_TID_SKIP_UL_TWT_PAUSED, /* Skip ul tid if twt txq is paused */
HTT_SCHED_TID_SKIP_PEER_UL_RX_NOT_ACTIVE, /* Skip ul tid if peer ul rx is not active */
HTT_SCHED_TID_SKIP_NO_FORCE_TRIGGER, /* Skip ul tid if there is no force triggers */
HTT_SCHED_TID_SKIP_SMART_BASIC_TRIGGER, /* Skip ul tid if smart basic trigger doesnot have enough data */
HTT_SCHED_INELIGIBILITY_MAX,
} htt_sched_txq_sched_ineligibility_tlv_enum;
@ -7426,4 +7523,544 @@ typedef struct {
A_UINT32 drain_dest_ring_mask;
} htt_dmac_reset_stats_tlv;
/* Support up to 640 MHz mode for future expansion */
#define HTT_PUNCTURE_STATS_MAX_SUBBAND_COUNT 32
#define HTT_PDEV_PUNCTURE_STATS_MAC_ID_M 0x000000ff
#define HTT_PDEV_PUNCTURE_STATS_MAC_ID_S 0
#define HTT_PDEV_PUNCTURE_STATS_MAC_ID_GET(_var) \
(((_var) & HTT_PDEV_PUNCTURE_STATS_MAC_ID_M) >> \
HTT_PDEV_PUNCTURE_STATS_MAC_ID_S)
#define HTT_PDEV_PUNCTURE_STATS_MAC_ID_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_PDEV_PUNCTURE_STATS_MAC_ID, _val); \
((_var) |= ((_val) << HTT_PDEV_PUNCTURE_STATS_MAC_ID_S)); \
} while (0)
/*
* TLV used to provide puncturing related stats for TX/RX and each PPDU type.
*/
typedef struct {
htt_tlv_hdr_t tlv_hdr;
/**
* BIT [ 7 : 0] :- mac_id
* BIT [31 : 8] :- reserved
*/
union {
struct {
A_UINT32 mac_id: 8,
reserved: 24;
};
A_UINT32 mac_id__word;
};
/*
* Stats direction (TX/RX). Enum value from HTT_STATS_DIRECTION.
*/
A_UINT32 direction;
/*
* Preamble type. Enum value from HTT_STATS_PREAM_TYPE.
*
* Note that for although OFDM rates don't technically support
* "puncturing", this TLV can be used to indicate the 20 MHz sub-bands
* utilized for OFDM legacy duplicate packets, which are also used during
* puncturing sequences.
*/
A_UINT32 preamble;
/*
* Stats PPDU type. Enum value from HTT_STATS_PPDU_TYPE.
*/
A_UINT32 ppdu_type;
/*
* Indicates the number of valid elements in the
* "num_subbands_used_cnt" array, and must be <=
* HTT_PUNCTURE_STATS_MAX_SUBBAND_COUNT.
*
* Also indicates how many bits in the last_used_pattern_mask may be
* non-zero.
*/
A_UINT32 subband_count;
/*
* The last used transmit 20 MHz subband mask. Bit 0 represents the lowest
* 20 MHz subband mask, bit 1 the second lowest, and so on.
*
* All 32 bits are valid and will be used for expansion to higher BW modes.
*/
A_UINT32 last_used_pattern_mask;
/*
* Number of array elements with valid values is equal to "subband_count".
* If subband_count is < HTT_PUNCTURE_STATS_MAX_SUBBAND_COUNT, the
* remaining elements will be implicitly set to 0x0.
*
* The array index is the number of 20 MHz subbands utilized during TX/RX,
* and the counter value at that index is the number of times that subband
* count was used.
*
* The count is incremented once for each OTA PPDU transmitted / received.
*/
A_UINT32 num_subbands_used_cnt[HTT_PUNCTURE_STATS_MAX_SUBBAND_COUNT];
} htt_pdev_puncture_stats_tlv;
#define HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_M 0x0000003F
#define HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_S 0
#define HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_M 0x00000FC0
#define HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_S 6
#define HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_M 0x0FFFF000
#define HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_S 12
#define HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_GET(_var) \
(((_var) & HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_M) >> \
HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_S)
#define HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD, _val); \
((_var) &= ~(HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_M)); \
((_var) |= ((_val) << HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_S)); \
} while (0)
#define HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_GET(_var) \
(((_var) & HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_M) >> \
HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_S)
#define HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD, _val); \
((_var) &= ~(HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_M)); \
((_var) |= ((_val) << HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_S)); \
} while (0)
#define HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_GET(_var) \
(((_var) & HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_M) >> \
HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_S)
#define HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX, _val); \
((_var) &= ~(HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_M)); \
((_var) |= ((_val) << HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_S)); \
} while (0)
typedef struct {
htt_tlv_hdr_t tlv_hdr;
union {
struct {
A_UINT32 peer_assoc_ipc_recvd : 6,
sched_peer_delete_recvd : 6,
mld_ast_index : 16,
reserved : 4;
};
A_UINT32 msg_dword_1;
};
} htt_ml_peer_ext_details_tlv;
#define HTT_ML_LINK_INFO_VALID_M 0x00000001
#define HTT_ML_LINK_INFO_VALID_S 0
#define HTT_ML_LINK_INFO_ACTIVE_M 0x00000002
#define HTT_ML_LINK_INFO_ACTIVE_S 1
#define HTT_ML_LINK_INFO_PRIMARY_M 0x00000004
#define HTT_ML_LINK_INFO_PRIMARY_S 2
#define HTT_ML_LINK_INFO_ASSOC_LINK_M 0x00000008
#define HTT_ML_LINK_INFO_ASSOC_LINK_S 3
#define HTT_ML_LINK_INFO_CHIP_ID_M 0x00000070
#define HTT_ML_LINK_INFO_CHIP_ID_S 4
#define HTT_ML_LINK_INFO_IEEE_LINK_ID_M 0x00007F80
#define HTT_ML_LINK_INFO_IEEE_LINK_ID_S 7
#define HTT_ML_LINK_INFO_HW_LINK_ID_M 0x00038000
#define HTT_ML_LINK_INFO_HW_LINK_ID_S 15
#define HTT_ML_LINK_INFO_LOGICAL_LINK_ID_M 0x000C0000
#define HTT_ML_LINK_INFO_LOGICAL_LINK_ID_S 18
#define HTT_ML_LINK_INFO_MASTER_LINK_M 0x00100000
#define HTT_ML_LINK_INFO_MASTER_LINK_S 20
#define HTT_ML_LINK_INFO_ANCHOR_LINK_M 0x00200000
#define HTT_ML_LINK_INFO_ANCHOR_LINK_S 21
#define HTT_ML_LINK_INFO_INITIALIZED_M 0x00400000
#define HTT_ML_LINK_INFO_INITIALIZED_S 22
#define HTT_ML_LINK_INFO_SW_PEER_ID_M 0x0000ffff
#define HTT_ML_LINK_INFO_SW_PEER_ID_S 0
#define HTT_ML_LINK_INFO_VDEV_ID_M 0x00ff0000
#define HTT_ML_LINK_INFO_VDEV_ID_S 16
#define HTT_ML_LINK_INFO_VALID_GET(_var) \
(((_var) & HTT_ML_LINK_INFO_VALID_M) >> \
HTT_ML_LINK_INFO_VALID_S)
#define HTT_ML_LINK_INFO_VALID_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_VALID, _val); \
((_var) &= ~(HTT_ML_LINK_INFO_VALID_M)); \
((_var) |= ((_val) << HTT_ML_LINK_INFO_VALID_S)); \
} while (0)
#define HTT_ML_LINK_INFO_ACTIVE_GET(_var) \
(((_var) & HTT_ML_LINK_INFO_ACTIVE_M) >> \
HTT_ML_LINK_INFO_ACTIVE_S)
#define HTT_ML_LINK_INFO_ACTIVE_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_ACTIVE, _val); \
((_var) &= ~(HTT_ML_LINK_INFO_ACTIVE_M)); \
((_var) |= ((_val) << HTT_ML_LINK_INFO_ACTIVE_S)); \
} while (0)
#define HTT_ML_LINK_INFO_PRIMARY_GET(_var) \
(((_var) & HTT_ML_LINK_INFO_PRIMARY_M) >> \
HTT_ML_LINK_INFO_PRIMARY_S)
#define HTT_ML_LINK_INFO_PRIMARY_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_PRIMARY, _val); \
((_var) &= ~(HTT_ML_LINK_INFO_PRIMARY_M)); \
((_var) |= ((_val) << HTT_ML_LINK_INFO_PRIMARY_S)); \
} while (0)
#define HTT_ML_LINK_INFO_ASSOC_LINK_GET(_var) \
(((_var) & HTT_ML_LINK_INFO_ASSOC_LINK_M) >> \
HTT_ML_LINK_INFO_ASSOC_LINK_S)
#define HTT_ML_LINK_INFO_ASSOC_LINK_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_ASSOC_LINK, _val); \
((_var) &= ~(HTT_ML_LINK_INFO_ASSOC_LINK_M)); \
((_var) |= ((_val) << HTT_ML_LINK_INFO_ASSOC_LINK_S)); \
} while (0)
#define HTT_ML_LINK_INFO_CHIP_ID_GET(_var) \
(((_var) & HTT_ML_LINK_INFO_CHIP_ID_M) >> \
HTT_ML_LINK_INFO_CHIP_ID_S)
#define HTT_ML_LINK_INFO_CHIP_ID_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_CHIP_ID, _val); \
((_var) &= ~(HTT_ML_LINK_INFO_CHIP_ID_M)); \
((_var) |= ((_val) << HTT_ML_LINK_INFO_CHIP_ID_S)); \
} while (0)
#define HTT_ML_LINK_INFO_IEEE_LINK_ID_GET(_var) \
(((_var) & HTT_ML_LINK_INFO_IEEE_LINK_ID_M) >> \
HTT_ML_LINK_INFO_IEEE_LINK_ID_S)
#define HTT_ML_LINK_INFO_IEEE_LINK_ID_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_IEEE_LINK_ID, _val); \
((_var) &= ~(HTT_ML_LINK_INFO_IEEE_LINK_ID_M)); \
((_var) |= ((_val) << HTT_ML_LINK_INFO_IEEE_LINK_ID_S)); \
} while (0)
#define HTT_ML_LINK_INFO_HW_LINK_ID_GET(_var) \
(((_var) & HTT_ML_LINK_INFO_HW_LINK_ID_M) >> \
HTT_ML_LINK_INFO_HW_LINK_ID_S)
#define HTT_ML_LINK_INFO_HW_LINK_ID_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_HW_LINK_ID, _val); \
((_var) &= ~(HTT_ML_LINK_INFO_HW_LINK_ID_M)); \
((_var) |= ((_val) << HTT_ML_LINK_INFO_HW_LINK_ID_S)); \
} while (0)
#define HTT_ML_LINK_INFO_LOGICAL_LINK_ID_GET(_var) \
(((_var) & HTT_ML_LINK_INFO_LOGICAL_LINK_ID_M) >> \
HTT_ML_LINK_INFO_LOGICAL_LINK_ID_S)
#define HTT_ML_LINK_INFO_LOGICAL_LINK_ID_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_LOGICAL_LINK_ID, _val); \
((_var) &= ~(HTT_ML_LINK_INFO_LOGICAL_LINK_ID_M)); \
((_var) |= ((_val) << HTT_ML_LINK_INFO_LOGICAL_LINK_ID_S)); \
} while (0)
#define HTT_ML_LINK_INFO_MASTER_LINK_GET(_var) \
(((_var) & HTT_ML_LINK_INFO_MASTER_LINK_M) >> \
HTT_ML_LINK_INFO_MASTER_LINK_S)
#define HTT_ML_LINK_INFO_MASTER_LINK_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_MASTER_LINK, _val); \
((_var) &= ~(HTT_ML_LINK_INFO_MASTER_LINK_M)); \
((_var) |= ((_val) << HTT_ML_LINK_INFO_MASTER_LINK_S)); \
} while (0)
#define HTT_ML_LINK_INFO_ANCHOR_LINK_GET(_var) \
(((_var) & HTT_ML_LINK_INFO_ANCHOR_LINK_M) >> \
HTT_ML_LINK_INFO_ANCHOR_LINK_S)
#define HTT_ML_LINK_INFO_ANCHOR_LINK_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_ANCHOR_LINK, _val); \
((_var) &= ~(HTT_ML_LINK_INFO_ANCHOR_LINK_M)); \
((_var) |= ((_val) << HTT_ML_LINK_INFO_ANCHOR_LINK_S)); \
} while (0)
#define HTT_ML_LINK_INFO_INITIALIZED_GET(_var) \
(((_var) & HTT_ML_LINK_INFO_INITIALIZED_M) >> \
HTT_ML_LINK_INFO_INITIALIZED_S)
#define HTT_ML_LINK_INFO_INITIALIZED_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_INITIALIZED, _val); \
((_var) &= ~(HTT_ML_LINK_INFO_INITIALIZED_M)); \
((_var) |= ((_val) << HTT_ML_LINK_INFO_INITIALIZED_S)); \
} while (0)
#define HTT_ML_LINK_INFO_SW_PEER_ID_GET(_var) \
(((_var) & HTT_ML_LINK_INFO_SW_PEER_ID_M) >> \
HTT_ML_LINK_INFO_SW_PEER_ID_S)
#define HTT_ML_LINK_INFO_SW_PEER_ID_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_SW_PEER_ID, _val); \
((_var) &= ~(HTT_ML_LINK_INFO_SW_PEER_ID_M)); \
((_var) |= ((_val) << HTT_ML_LINK_INFO_SW_PEER_ID_S)); \
} while (0)
#define HTT_ML_LINK_INFO_VDEV_ID_GET(_var) \
(((_var) & HTT_ML_LINK_INFO_VDEV_ID_M) >> \
HTT_ML_LINK_INFO_VDEV_ID_S)
#define HTT_ML_LINK_INFO_VDEV_ID_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_VDEV_ID, _val); \
((_var) &= ~(HTT_ML_LINK_INFO_VDEV_ID_M)); \
((_var) |= ((_val) << HTT_ML_LINK_INFO_VDEV_ID_S)); \
} while (0)
typedef struct {
htt_tlv_hdr_t tlv_hdr;
union {
struct {
A_UINT32 valid : 1,
active : 1,
primary : 1,
assoc_link : 1,
chip_id : 3,
ieee_link_id : 8,
hw_link_id : 3,
logical_link_id : 2,
master_link : 1,
anchor_link : 1,
initialized : 1,
reserved : 9;
};
A_UINT32 msg_dword_1;
};
union {
struct {
A_UINT32 sw_peer_id : 16,
vdev_id : 8,
reserved1 : 8;
};
A_UINT32 msg_dword_2;
};
A_UINT32 primary_tid_mask;
} htt_ml_link_info_tlv;
#define HTT_ML_PEER_DETAILS_NUM_LINKS_M 0x00000003
#define HTT_ML_PEER_DETAILS_NUM_LINKS_S 0
#define HTT_ML_PEER_DETAILS_ML_PEER_ID_M 0x00003FFC
#define HTT_ML_PEER_DETAILS_ML_PEER_ID_S 2
#define HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_M 0x0001C000
#define HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_S 14
#define HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_M 0x00060000
#define HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_S 17
#define HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_M 0x00380000
#define HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_S 19
#define HTT_ML_PEER_DETAILS_NON_STR_M 0x00400000
#define HTT_ML_PEER_DETAILS_NON_STR_S 22
#define HTT_ML_PEER_DETAILS_EMLSR_M 0x00800000
#define HTT_ML_PEER_DETAILS_EMLSR_S 23
#define HTT_ML_PEER_DETAILS_IS_STA_KO_M 0x01000000
#define HTT_ML_PEER_DETAILS_IS_STA_KO_S 24
#define HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_M 0x06000000
#define HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_S 25
#define HTT_ML_PEER_DETAILS_ALLOCATED_M 0x08000000
#define HTT_ML_PEER_DETAILS_ALLOCATED_S 27
#define HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_M 0x000000ff
#define HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_S 0
#define HTT_ML_PEER_DETAILS_NUM_LINKS_GET(_var) \
(((_var) & HTT_ML_PEER_DETAILS_NUM_LINKS_M) >> \
HTT_ML_PEER_DETAILS_NUM_LINKS_S)
#define HTT_ML_PEER_DETAILS_NUM_LINKS_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_NUM_LINKS, _val); \
((_var) &= ~(HTT_ML_PEER_DETAILS_NUM_LINKS_M)); \
((_var) |= ((_val) << HTT_ML_PEER_DETAILS_NUM_LINKS_S)); \
} while (0)
#define HTT_ML_PEER_DETAILS_ML_PEER_ID_GET(_var) \
(((_var) & HTT_ML_PEER_DETAILS_ML_PEER_ID_M) >> \
HTT_ML_PEER_DETAILS_ML_PEER_ID_S)
#define HTT_ML_PEER_DETAILS_ML_PEER_ID_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_ML_PEER_ID, _val); \
((_var) &= ~(HTT_ML_PEER_DETAILS_ML_PEER_ID_M)); \
((_var) |= ((_val) << HTT_ML_PEER_DETAILS_ML_PEER_ID_S)); \
} while (0)
#define HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_GET(_var) \
(((_var) & HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_M) >> \
HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_S)
#define HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX, _val); \
((_var) &= ~(HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_M)); \
((_var) |= ((_val) << HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_S)); \
} while (0)
#define HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_GET(_var) \
(((_var) & HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_M) >> \
HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_S)
#define HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID, _val); \
((_var) &= ~(HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_M)); \
((_var) |= ((_val) << HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_S)); \
} while (0)
#define HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_GET(_var) \
(((_var) & HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_M) >> \
HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_S)
#define HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_LINK_INIT_COUNT, _val); \
((_var) &= ~(HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_M)); \
((_var) |= ((_val) << HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_S)); \
} while (0)
#define HTT_ML_PEER_DETAILS_NON_STR_GET(_var) \
(((_var) & HTT_ML_PEER_DETAILS_NON_STR_M) >> \
HTT_ML_PEER_DETAILS_NON_STR_S)
#define HTT_ML_PEER_DETAILS_NON_STR_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_NON_STR, _val); \
((_var) &= ~(HTT_ML_PEER_DETAILS_NON_STR_M)); \
((_var) |= ((_val) << HTT_ML_PEER_DETAILS_NON_STR_S)); \
} while (0)
#define HTT_ML_PEER_DETAILS_EMLSR_GET(_var) \
(((_var) & HTT_ML_PEER_DETAILS_EMLSR_M) >> \
HTT_ML_PEER_DETAILS_EMLSR_S)
#define HTT_ML_PEER_DETAILS_EMLSR_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_EMLSR, _val); \
((_var) &= ~(HTT_ML_PEER_DETAILS_EMLSR_M)); \
((_var) |= ((_val) << HTT_ML_PEER_DETAILS_EMLSR_S)); \
} while (0)
#define HTT_ML_PEER_DETAILS_IS_STA_KO_GET(_var) \
(((_var) & HTT_ML_PEER_DETAILS_IS_STA_KO_M) >> \
HTT_ML_PEER_DETAILS_IS_STA_KO_S)
#define HTT_ML_PEER_DETAILS_IS_STA_KO_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_IS_STA_KO, _val); \
((_var) &= ~(HTT_ML_PEER_DETAILS_IS_STA_KO_M)); \
((_var) |= ((_val) << HTT_ML_PEER_DETAILS_IS_STA_KO_S)); \
} while (0)
#define HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_GET(_var) \
(((_var) & HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_M) >> \
HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_S)
#define HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS, _val); \
((_var) &= ~(HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_M)); \
((_var) |= ((_val) << HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_S)); \
} while (0)
#define HTT_ML_PEER_DETAILS_ALLOCATED_GET(_var) \
(((_var) & HTT_ML_PEER_DETAILS_ALLOCATED_M) >> \
HTT_ML_PEER_DETAILS_ALLOCATED_S)
#define HTT_ML_PEER_DETAILS_ALLOCATED_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_ALLOCATED, _val); \
((_var) &= ~(HTT_ML_PEER_DETAILS_ALLOCATED_M)); \
((_var) |= ((_val) << HTT_ML_PEER_DETAILS_ALLOCATED_S)); \
} while (0)
#define HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_GET(_var) \
(((_var) & HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_M) >> \
HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_S)
#define HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_SET(_var, _val) \
do { \
HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP, _val); \
((_var) &= ~(HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_M)); \
((_var) |= ((_val) << HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_S)); \
} while (0)
typedef struct {
htt_tlv_hdr_t tlv_hdr;
htt_mac_addr remote_mld_mac_addr;
union {
struct {
A_UINT32 num_links : 2,
ml_peer_id : 12,
primary_link_idx : 3,
primary_chip_id : 2,
link_init_count : 3,
non_str : 1,
emlsr : 1,
is_sta_ko : 1,
num_local_links : 2,
allocated : 1,
reserved : 4;
};
A_UINT32 msg_dword_1;
};
union {
struct {
A_UINT32 participating_chips_bitmap : 8,
reserved1 : 24;
};
A_UINT32 msg_dword_2;
};
/*
* ml_peer_flags is an opaque field that cannot be interpreted by
* the host; it is only for off-line debug.
*/
A_UINT32 ml_peer_flags;
} htt_ml_peer_details_tlv;
/* STATS_TYPE : HTT_DBG_EXT_STATS_ML_PEERS_INFO
* TLV_TAGS:
* - HTT_STATS_ML_PEER_DETAILS_TAG
* - HTT_STATS_ML_LINK_INFO_DETAILS_TAG
* - HTT_STATS_ML_PEER_EXT_DETAILS_TAG (multiple)
*/
/* NOTE:
* This structure is for documentation, and cannot be safely used directly.
* Instead, use the constituent TLV structures to fill/parse.
*/
typedef struct _htt_ml_peer_stats {
htt_ml_peer_details_tlv ml_peer_details;
htt_ml_peer_ext_details_tlv ml_peer_ext_details;
htt_ml_link_info_tlv ml_link_info[];
} htt_ml_peer_stats_t;
#endif /* __HTT_STATS_H__ */

1
fw/wmi_services.h
View File

@ -592,6 +592,7 @@ typedef enum {
WMI_SERVICE_LINKSPEED_ROAM_TRIGGER_SUPPORT = 339, /* FW supports linkspeed trigger roam */
WMI_SERVICE_UMAC_HANG_RECOVERY_SUPPORT = 340, /* FW supports recovering system from UMAC hang condition */
WMI_SERVICE_COAP_OFFLOAD_SUPPORT = 341, /* FW supports CoAP (the Constrained Application Protocol) offload */
WMI_SERVICE_TDLS_WIDEBAND_SUPPORT = 342, /* FW supports Wideband TDLS */
WMI_MAX_EXT2_SERVICE

30
fw/wmi_tlv_defs.h
View File

@ -1282,6 +1282,12 @@ typedef enum {
WMITLV_TAG_STRUC_WMI_WOW_COAP_GET_BUF_INFO_CMD_fixed_param,
WMITLV_TAG_STRUC_WMI_WOW_COAP_BUF_INFO_EVENT_fixed_param,
WMITLV_TAG_STRUC_wmi_coap_tuple,
WMITLV_TAG_STRUC_wmi_iface_powersave_stats,
WMITLV_TAG_STRUC_wmi_roam_bss_info_param,
WMITLV_TAG_STRUC_wmi_vendor_control_param,
WMITLV_TAG_STRUC_wmi_coex_dbam_cmd_fixed_param,
WMITLV_TAG_STRUC_wmi_coex_dbam_complete_event_fixed_param,
WMITLV_TAG_STRUC_wmi_is_my_mgmt_frame,
} WMITLV_TAG_ID;
/*
@ -1785,6 +1791,7 @@ typedef enum {
OP(WMI_WOW_COAP_ADD_KEEPALIVE_PATTERN_CMDID) \
OP(WMI_WOW_COAP_DEL_KEEPALIVE_PATTERN_CMDID) \
OP(WMI_WOW_COAP_GET_BUF_INFO_CMDID) \
OP(WMI_COEX_DBAM_CMDID) \
/* add new CMD_LIST elements above this line */
@ -2074,6 +2081,7 @@ typedef enum {
OP(WMI_ROAM_GET_VENDOR_CONTROL_PARAM_EVENTID) \
OP(WMI_HALPHY_CTRL_PATH_STATS_EVENTID) \
OP(WMI_WOW_COAP_BUF_INFO_EVENTID) \
OP(WMI_COEX_DBAM_COMPLETE_EVENTID) \
/* add new EVT_LIST elements above this line */
@ -5106,6 +5114,11 @@ WMITLV_CREATE_PARAM_STRUC(WMI_WOW_COAP_DEL_KEEPALIVE_PATTERN_CMDID);
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_WMI_WOW_COAP_GET_BUF_INFO_CMD_fixed_param, WMI_WOW_COAP_GET_BUF_INFO_CMD_fixed_param, fixed_param, WMITLV_SIZE_FIX)
WMITLV_CREATE_PARAM_STRUC(WMI_WOW_COAP_GET_BUF_INFO_CMDID);
/* coex dbam cmd */
#define WMITLV_TABLE_WMI_COEX_DBAM_CMDID(id,op,buf,len) \
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_coex_dbam_cmd_fixed_param, wmi_coex_dbam_cmd_fixed_param, fixed_param, WMITLV_SIZE_FIX)
WMITLV_CREATE_PARAM_STRUC(WMI_COEX_DBAM_CMDID);
/************************** TLV definitions of WMI events *******************************/
@ -5372,7 +5385,8 @@ WMITLV_CREATE_PARAM_STRUC(WMI_PEER_STA_KICKOUT_EVENTID);
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_mgmt_rx_params_ext, mgmt_rx_params_ext, WMITLV_SIZE_VAR) \
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_frame_pn_params, pn_params, WMITLV_SIZE_VAR) \
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_mgmt_ml_info, ml_info, WMITLV_SIZE_VAR) \
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bpcc_bufp, WMITLV_SIZE_VAR)
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, bpcc_bufp, WMITLV_SIZE_VAR) \
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_is_my_mgmt_frame, my_frame, WMITLV_SIZE_VAR)
WMITLV_CREATE_PARAM_STRUC(WMI_MGMT_RX_EVENTID);
/* Management Rx FW Consumed Event */
@ -5421,7 +5435,8 @@ WMITLV_CREATE_PARAM_STRUC(WMI_AGGR_STATE_TRIG_EVENTID);
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_roam_event_fixed_param, wmi_roam_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, deauth_disassoc_frame, WMITLV_SIZE_VAR) \
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_pdev_hw_mode_transition_event_fixed_param, hw_mode_transition_fixed_param, WMITLV_SIZE_VAR) \
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_pdev_set_hw_mode_response_vdev_mac_entry, wmi_pdev_set_hw_mode_response_vdev_mac_mapping, WMITLV_SIZE_VAR)
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_pdev_set_hw_mode_response_vdev_mac_entry, wmi_pdev_set_hw_mode_response_vdev_mac_mapping, WMITLV_SIZE_VAR) \
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_roam_bss_info_param, bss_info_param, WMITLV_SIZE_VAR)
WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_EVENTID);
/* Roam Synch Event */
@ -5459,7 +5474,8 @@ WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_FRAME_EVENTID);
/* Get Roam Vendor Control Param Event */
#define WMITLV_TABLE_WMI_ROAM_GET_VENDOR_CONTROL_PARAM_EVENTID(id,op,buf,len) \
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_roam_get_vendor_control_param_event_fixed_param, wmi_roam_get_vendor_control_param_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_roam_get_vendor_control_param_event_fixed_param, wmi_roam_get_vendor_control_param_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_vendor_control_param, vendor_control_param, WMITLV_SIZE_VAR)
WMITLV_CREATE_PARAM_STRUC(WMI_ROAM_GET_VENDOR_CONTROL_PARAM_EVENTID);
/* WOW Wakeup Host Event */
@ -5712,7 +5728,8 @@ WMITLV_CREATE_PARAM_STRUC(WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID);
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_iface_link_stats_event_fixed_param, wmi_iface_link_stats_event_fixed_param, fixed_param, WMITLV_SIZE_FIX) \
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_iface_link_stats, iface_link_stats, WMITLV_SIZE_VAR) \
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_wmm_ac_stats, ac, WMITLV_SIZE_VAR) \
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_iface_offload_stats, iface_offload_stats, WMITLV_SIZE_VAR)
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_iface_offload_stats, iface_offload_stats, WMITLV_SIZE_VAR) \
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_STRUC, wmi_iface_powersave_stats, iface_powersave_stats, WMITLV_SIZE_VAR)
WMITLV_CREATE_PARAM_STRUC(WMI_IFACE_LINK_STATS_EVENTID);
@ -6912,6 +6929,11 @@ WMITLV_CREATE_PARAM_STRUC(WMI_PMM_SCRATCH_REG_ALLOCATION_COMPLETE_EVENTID);
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_ARRAY_BYTE, A_UINT8, payloads, WMITLV_SIZE_VAR)
WMITLV_CREATE_PARAM_STRUC(WMI_WOW_COAP_BUF_INFO_EVENTID);
/* coex dbam cmd complete event */
#define WMITLV_TABLE_WMI_COEX_DBAM_COMPLETE_EVENTID(id,op,buf,len) \
WMITLV_ELEM(id,op,buf,len, WMITLV_TAG_STRUC_wmi_coex_dbam_complete_event_fixed_param, wmi_coex_dbam_complete_event_fixed_param, fixed_param, WMITLV_SIZE_FIX)
WMITLV_CREATE_PARAM_STRUC(WMI_COEX_DBAM_COMPLETE_EVENTID);
#ifdef __cplusplus

186
fw/wmi_unified.h
View File

@ -851,7 +851,7 @@ typedef enum {
WMI_ROAM_SET_PARAM_CMDID,
/** Enable or Disable roam vendor control */
WMI_ROAM_ENABLE_VENDOR_CONTROL_CMDID,
/** Get roam vendor control params */
/** Get firmware ini value */
WMI_ROAM_GET_VENDOR_CONTROL_PARAM_CMDID,
/** offload scan specific commands */
@ -1305,6 +1305,8 @@ typedef enum {
WMI_COEX_GET_ANTENNA_ISOLATION_CMDID,
WMI_SAR_LIMITS_CMDID,
WMI_SAR_GET_LIMITS_CMDID,
/** Dedicated BT Antenna Mode (DBAM) command */
WMI_COEX_DBAM_CMDID,
/**
* OBSS scan offload enable/disable commands
@ -1888,7 +1890,7 @@ typedef enum {
WMI_ROAM_CAPABILITY_REPORT_EVENTID,
/** Send AP frame content like beacon/probe resp etc.. */
WMI_ROAM_FRAME_EVENTID,
/** GET Roam Vendor Control Param event */
/** Send firmware ini value corresponding to param_id */
WMI_ROAM_GET_VENDOR_CONTROL_PARAM_EVENTID,
/** P2P disc found */
@ -2171,6 +2173,8 @@ typedef enum {
/* Coex Event */
WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_COEX),
WMI_SAR_GET_LIMITS_EVENTID,
/** Dedicated BT Antenna Mode (DBAM) complete event */
WMI_COEX_DBAM_COMPLETE_EVENTID,
/* LPI Event */
WMI_LPI_RESULT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_LPI),
@ -5837,6 +5841,12 @@ typedef struct {
A_UINT8 prev_pn[WMI_MAX_PN_LEN];
} wmi_frame_pn_params;
typedef struct {
A_UINT32 tlv_header; /* TLV tag (WMITLV_TAG_STRUC_wmi_is_my_frame) */
A_UINT32 mgmt_frm_sub_type; /* to indicate which sub-type of MGMT frame */
A_UINT32 is_my_frame; /* to indicate frame is sent to this BSSID */
} wmi_is_my_mgmt_frame;
typedef struct {
A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_mgmt_ml_info */
/**
@ -10048,6 +10058,14 @@ typedef struct {
A_UINT32 fwd_count;
} wmi_iface_offload_stats;
typedef struct {
A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_iface_powersave_stats */
/** Total TIM beacon event that wlan ps received **/
A_UINT32 tot_tim_bcn;
/** Total error TIM beacon found by wlan ps including no rx in TIM wakeup and TIM event in active state **/
A_UINT32 tot_err_tim_bcn;
} wmi_iface_powersave_stats;
/** Interface statistics (once started) reset and start afresh after each connection */
typedef struct {
A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_iface_link_stats_event_fixed_param */
@ -10062,6 +10080,7 @@ typedef struct {
* wmi_iface_link_stats iface_link_stats;
* num_ac * size of(struct wmi_wmm_ac_stats)
* wmi_iface_offload_stats iface_offload_stats[num_offload_stats]
* wmi_iface_powersave_stats iface_powersave_stats[]
*/
} wmi_iface_link_stats_event_fixed_param;
@ -12073,6 +12092,10 @@ typedef struct {
#define WMI_MLO_FLAGS_SET_PEER_ID_VALID(mlo_flags, value) WMI_SET_BITS(mlo_flags, 4, 1, value)
#define WMI_MLO_FLAGS_GET_MCAST_VDEV(mlo_flags) WMI_GET_BITS(mlo_flags, 5, 1)
#define WMI_MLO_FLAGS_SET_MCAST_VDEV(mlo_flags, value) WMI_SET_BITS(mlo_flags, 5, 1, value)
#define WMI_MLO_FLAGS_GET_EMLSR_SUPPORT(mlo_flags) WMI_GET_BITS(mlo_flags, 6, 1)
#define WMI_MLO_FLAGS_SET_EMLSR_SUPPORT(mlo_flags, value) WMI_SET_BITS(mlo_flags, 6, 1, value)
#define WMI_MLO_FLAGS_GET_FORCE_LINK_INACTIVE(mlo_flags) WMI_GET_BITS(mlo_flags, 7, 1)
#define WMI_MLO_FLAGS_SET_FORCE_LINK_INACTIVE(mlo_flags, value) WMI_SET_BITS(mlo_flags, 7, 1, value)
/* this structure used for pass mlo flags*/
typedef struct {
@ -14110,6 +14133,11 @@ typedef enum {
*/
WMI_VDEV_PARAM_VDEV_TRAFFIC_CONFIG, /* 0xB6 */
/* Final bmiss time for Non WOW mode in sec */
WMI_VDEV_PARAM_FINAL_BMISS_TIME_SEC, /* 0xB7 */
/* Final bmiss time for WOW mode in sec */
WMI_VDEV_PARAM_FINAL_BMISS_TIME_WOW_SEC, /* 0xB8 */
/*=== ADD NEW VDEV PARAM TYPES ABOVE THIS LINE ===
* The below vdev param types are used for prototyping, and are
@ -16348,6 +16376,10 @@ typedef struct {
A_UINT32 ieee_link_id;
/** eMLSR transition timeout in microseconds */
A_UINT32 emlsr_trans_timeout_us;
/** eMLSR transition delay in microseconds */
A_UINT32 emlsr_trans_delay_us;
/** eMLSR padding delay in microseconds */
A_UINT32 emlsr_padding_delay_us;
} wmi_peer_assoc_mlo_params;
typedef struct {
@ -18072,6 +18104,23 @@ typedef struct {
A_UINT32 notif_params1;
} wmi_roam_event_fixed_param;
#define WMI_ROAM_BSS_INFO_FLAG_IS_MLD 0
typedef struct {
A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_bss_info_param */
/*
* bit0: WMI_ROAM_BSS_INFO_FLAG_IS_MLD
*/
A_UINT32 flags;
/*
* mld score if WMI_ROAM_BSS_INFO_FLAG_IS_MLD set, otherwise link score
*/
A_UINT32 score;
/*
* mld address if WMI_ROAM_BSS_INFO_FLAG_IS_MLD set, otherwise link address
*/
wmi_mac_addr mac_addr;
} wmi_roam_bss_info_param;
/* roam_reason: bits 0-3 */
#define WMI_ROAM_REASON_INVALID 0x0 /** invalid reason. Do not interpret reason field */
@ -18965,6 +19014,8 @@ typedef enum wake_reason_e {
WOW_REASON_DELAYED_WAKEUP_HOST_CFG_TIMER_ELAPSED,
/* Data store list is full, so Host wakeup should be triggered */
WOW_REASON_DELAYED_WAKEUP_DATA_STORE_LIST_FULL,
/* Sched PM FW initiated termination event */
WOW_REASON_SCHED_PM_TERMINATED,
/* add new WOW_REASON_ defs before this line */
WOW_REASON_MAX,
@ -24219,6 +24270,9 @@ typedef struct {
A_UINT32 vdev_id;
/* Exact frame length without considering 4 byte alignement */
A_UINT32 frame_length;
A_INT32 rssi; /* Units in dBm */
/* The frequency on which to transmit. */
A_UINT32 primary_channel_freq; /* MHz units */
/**
* TLV (tag length value) parameters follows roam_frame_event
* The TLV's are:
@ -29514,6 +29568,18 @@ typedef struct {
A_UINT32 config_arg6;
} WMI_COEX_CONFIG_CMD_fixed_param;
typedef enum wmi_coex_dbam_mode_type {
WMI_COEX_DBAM_DISABLE = 0,
WMI_COEX_DBAM_ENABLE = 1,
WMI_COEX_DBAM_FORCED = 2,
} WMI_COEX_DBAM_MODE_TYPE;
typedef struct {
A_UINT32 tlv_header;
A_UINT32 vdev_id;
A_UINT32 dbam_mode; /* wmi_coex_dbam_mode_type enum */
} wmi_coex_dbam_cmd_fixed_param;
/**
* This command is sent from WLAN host driver to firmware to
* request firmware to enable/disable channel avoidance report
@ -30099,6 +30165,45 @@ typedef enum wmi_hw_mode_config_type {
#define WMI_NSS_RATIO_INFO_GET(dword) \
WMI_GET_BITS(dword, WMI_NSS_RATIO_INFO_BITPOS, 4)
/*
* 11BE EML Capability Set and Get macros
*/
#define WMI_SUPPORT_EMLSR_GET(eml_capability) WMI_GET_BITS(eml_capability, 0, 1)
#define WMI_SUPPORT_EMLSR_SET(eml_capability, value) WMI_SET_BITS(eml_capability, 0, 1, value)
#define WMI_EMLSR_PADDING_DELAY_GET(eml_capability) WMI_GET_BITS(eml_capability, 1, 3)
#define WMI_EMLSR_PADDING_DELAY_SET(eml_capability, value) WMI_SET_BITS(eml_capability, 1, 3, value)
#define WMI_EMLSR_TRANSITION_DELAY_GET(eml_capability) WMI_GET_BITS(eml_capability, 4, 3)
#define WMI_EMLSR_TRANSITION_DELAY_SET(eml_capability, value) WMI_SET_BITS(eml_capability, 4, 3, value)
#define WMI_SUPPORT_EMLMR_GET(eml_capability) WMI_GET_BITS(eml_capability, 7, 1)
#define WMI_SUPPORT_EMLMR_SET(eml_capability, value) WMI_SET_BITS(eml_capability, 7, 1, value)
#define WMI_EMLMR_DELAY_GET(eml_capability) WMI_GET_BITS(eml_capability, 8, 3)
#define WMI_EMLMR_DELAY_SET(eml_capability, value) WMI_SET_BITS(eml_capability, 8, 3, value)
#define WMI_TRANSITION_TIMEOUT_GET(eml_capability) WMI_GET_BITS(eml_capability, 11, 4)
#define WMI_TRANSITION_TIMEOUT_SET(eml_capability, value) WMI_SET_BITS(eml_capability, 11, 4, value)
/*
* 11BE MLD Capability Set and Get macros
*/
#define WMI_MAX_NUM_SIMULTANEOUS_LINKS_GET(mld_capability) WMI_GET_BITS(mld_capability, 0, 4)
#define WMI_MAX_NUM_SIMULTANEOUS_LINKS_SET(mld_capability, value) WMI_SET_BITS(mld_capability, 0, 4, value)
#define WMI_SUPPORT_SRS_GET(mld_capability) WMI_GET_BITS(mld_capability, 4, 1)
#define WMI_SUPPORT_SRS_SET(mld_capability, value) WMI_SET_BITS(mld_capability, 4, 1, value)
#define WMI_TID_TO_LINK_NEGOTIATION_GET(mld_capability) WMI_GET_BITS(mld_capability, 5, 2)
#define WMI_TID_TO_LINK_NEGOTIATION_SET(mld_capability, value) WMI_SET_BITS(mld_capability, 5, 2, value)
#define WMI_FREQ_SEPERATION_STR_GET(mld_capability) WMI_GET_BITS(mld_capability, 7, 5)
#define WMI_FREQ_SEPERATION_STR_SET(mld_capability, value) WMI_SET_BITS(mld_capability, 7, 5, value)
#define WMI_SUPPORT_AAR_GET(mld_capability) WMI_GET_BITS(mld_capability, 12, 1)
#define WMI_SUPPORT_AAR_SET(mld_capability, value) WMI_SET_BITS(mld_capability, 12, 1, value)
typedef struct {
A_UINT32 tlv_header; /* TLV tag and len; tag equals WMITLV_TAG_STRUC_WMI_MAC_PHY_CAPABILITIES */
/* hw_mode_id - identify a particular set of HW characteristics, as specified
@ -30348,11 +30453,32 @@ typedef struct {
*/
A_UINT32 eht_supp_mcs_ext_2G[WMI_MAX_EHT_SUPP_MCS_2G_SIZE];
A_UINT32 eht_supp_mcs_ext_5G[WMI_MAX_EHT_SUPP_MCS_5G_SIZE];
/**************************************************************************
* Currently pls do not add any new param after EHT
* as still under development.
* We can add new param before it.
**************************************************************************/
union {
struct {
A_UINT32 emlsr_support:1,
emlsr_padding_delay:3,
emlsr_transition_delay:3,
emlmr_support:1,
emlmr_delay:3,
transition_timeout:4,
reserved: 17;
};
A_UINT32 eml_capability;
};
union {
struct {
A_UINT32 max_num_simultaneous_links:4,
srs_support:1,
tid_to_link_negotiation_support:2, /* Set to 0 if TID-to-link mapping is not supported by the MLD.
* Set to 1 if MLD supports the mapping of each TID to the same or different link set.
* Set to 2 if MLD only supports the mapping of all TIDs to the same link set.
* Value 3 is reserved */
freq_separation_str:5,
aar_support:1,
reserved2: 19;
};
A_UINT32 mld_capability;
};
} WMI_MAC_PHY_CAPABILITIES_EXT;
typedef struct {
@ -31624,6 +31750,7 @@ static INLINE A_UINT8 *wmi_id_to_name(A_UINT32 wmi_command)
WMI_RETURN_STRING(WMI_WOW_COAP_ADD_KEEPALIVE_PATTERN_CMDID);
WMI_RETURN_STRING(WMI_WOW_COAP_DEL_KEEPALIVE_PATTERN_CMDID);
WMI_RETURN_STRING(WMI_WOW_COAP_GET_BUF_INFO_CMDID);
WMI_RETURN_STRING(WMI_COEX_DBAM_CMDID);
}
return (A_UINT8 *) "Invalid WMI cmd";
@ -32279,6 +32406,23 @@ typedef struct {
isolation_chain3:8; /* [31:24], isolation value for chain 3 */
} wmi_coex_report_isolation_event_fixed_param;
typedef enum {
WMI_COEX_DBAM_COMP_SUCCESS = 0, /* success, mode is applied */
WMI_COEX_DBAM_COMP_ONGOING = 1, /* success, mode is applied */
WMI_COEX_DBAM_COMP_DELAYED = 2, /* DBAM is delayed and TDD is selected temporarily */
WMI_COEX_DBAM_COMP_NOT_SUPPORT = 3, /* DBAM is not supported */
WMI_COEX_DBAM_COMP_TEST_MODE = 4, /* ignore due to test mode */
WMI_COEX_DBAM_COMP_INVALID_PARAM = 5, /* invalid parameter is received */
WMI_COEX_DBAM_COMP_FAIL = 6, /* command failed */
} wmi_coex_dbam_comp_status;
typedef struct {
/** TLV tag and len; tag equals
* WMITLV_TAG_STRUC_wmi_coex_dbam_complete_event_fixed_param */
A_UINT32 tlv_header;
A_UINT32 comp_status; /* wmi_coex_dbam_comp_status */
} wmi_coex_dbam_complete_event_fixed_param;
typedef enum {
WMI_RCPI_MEASUREMENT_TYPE_AVG_MGMT = 1,
WMI_RCPI_MEASUREMENT_TYPE_AVG_DATA = 2,
@ -32478,6 +32622,7 @@ typedef enum {
WMI_PDEV_ROUTING_TYPE_IPV4,
WMI_PDEV_ROUTING_TYPE_IPV6,
WMI_PDEV_ROUTING_TYPE_EAP,
WMI_PDEV_ROUTING_TYPE_VLAN,
} wmi_pdev_pkt_routing_type;
typedef enum {
@ -34512,6 +34657,8 @@ typedef enum {
ROAM_VENDOR_CONTROL_PARAM_PASSIVE_CH_DWELLTIME,
ROAM_VENDOR_CONTROL_PARAM_HOME_CH_TIME,
ROAM_VENDOR_CONTROL_PARAM_AWAY_TIME,
/* Sending query for all roam_vendor_control_param */
ROAM_VENDOR_CONTROL_PARAM_ALL = 0xFFFFFFFF,
} WMI_ROAM_GET_VENDOR_CONTROL_PARAM_ID;
typedef struct {
@ -34528,12 +34675,25 @@ typedef struct {
A_UINT32 tlv_header; /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_roam_get_vendor_control_param_event_fixed_param */
/** unique id identifying the VDEV, generated by the caller */
A_UINT32 vdev_id;
/** Vendor Control Param ID from enum WMI_ROAM_GET_VENDOR_CONTROL_PARAM_ID */
/**
* Vendor Control Param ID from enum WMI_ROAM_GET_VENDOR_CONTROL_PARAM_ID
* If param_id is ROAM_VENDOR_CONTROL_PARAM_ALL, send all vendor control
* param value defined in enum WMI_ROAM_GET_VENDOR_CONTROL_PARAM_ID
* using wmi_vendor_control_param tlv
*/
A_UINT32 param_id;
/** Vendor control param value */
A_UINT32 param_value;
} wmi_roam_get_vendor_control_param_event_fixed_param;
typedef struct {
A_UINT32 tlv_header; /** TLV tag and len; tag equals WMITLV_TAG_STRUC_wmi_vendor_control_param */
/** Vendor Control Param ID from enum WMI_ROAM_GET_VENDOR_CONTROL_PARAM_ID */
A_UINT32 param_id;
/** Vendor control param value */
A_UINT32 param_value;
} wmi_vendor_control_param;
/** the definition of different ROAM parameters */
typedef enum {
/* roam param to configure below roam events
@ -36414,7 +36574,15 @@ typedef struct {
#define WMI_EHTCAP_MAC_MAXAMPDULEN_EXP_GET(eht_cap_mac) WMI_GET_BITS(eht_cap_mac[0], 8, 1)
#define WMI_EHTCAP_MAC_MAXAMPDULEN_EXP_SET(eht_cap_mac, value) WMI_SET_BITS(eht_cap_mac[0], 8, 1, value)
/* Bit 9-15: reserved */
/* Bit 9: EHT TRS support */
#define WMI_EHTCAP_MAC_TRS_SUPPORT_GET(eht_cap_mac) WMI_GET_BITS(eht_cap_mac[0], 9, 1)
#define WMI_EHTCAP_MAC_TRS_SUPPORT_SET(eht_cap_mac, value) WMI_SET_BITS(eht_cap_mac[0], 9, 1, value)
/* Bit 10: TXOP return support in txop sharing mode 2 */
#define WMI_EHTCAP_MAC_TXOP_RETURN_SUPP_IN_SHARINGMODE2_GET(eht_cap_mac) WMI_GET_BITS(eht_cap_mac[0], 10, 1)
#define WMI_EHTCAP_MAC_TXOP_RETURN_SUPP_IN_SHARINGMODE2_SET(eht_cap_mac, value) WMI_SET_BITS(eht_cap_mac[0], 10, 1, value)
/* Bit 11-15: reserved */
/****** End of 11BE EHT MAC Capabilities Information field ******/

2
fw/wmi_version.h
View File

@ -37,7 +37,7 @@
#define __WMI_VER_MINOR_ 0
/** WMI revision number has to be incremented when there is a
* change that may or may not break compatibility. */
#define __WMI_REVISION_ 1161
#define __WMI_REVISION_ 1172
/** The Version Namespace should not be normally changed. Only
* host and firmware of the same WMI namespace will work

900
hw/qca8074/v2/phyrx_other_receive_info_su_evm_details.h Normal file
View File

@ -0,0 +1,900 @@
/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_H_
#define _PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_H_
#if !defined(__ASSEMBLER__)
#endif
// ################ START SUMMARY #################
//
// Dword Fields
// 0 number_of_symbols[15:0], nss_count[23:16], pilot_count[31:24]
// 1 pilot_0_evm[31:0]
// 2 pilot_1_evm[31:0]
// 3 pilot_2_evm[31:0]
// 4 pilot_3_evm[31:0]
// 5 pilot_4_evm[31:0]
// 6 pilot_5_evm[31:0]
// 7 pilot_6_evm[31:0]
// 8 pilot_7_evm[31:0]
// 9 pilot_8_evm[31:0]
// 10 pilot_9_evm[31:0]
// 11 pilot_10_evm[31:0]
// 12 pilot_11_evm[31:0]
// 13 pilot_12_evm[31:0]
// 14 pilot_13_evm[31:0]
// 15 pilot_14_evm[31:0]
// 16 pilot_15_evm[31:0]
// 17 pilot_16_evm[31:0]
// 18 pilot_17_evm[31:0]
// 19 pilot_18_evm[31:0]
// 20 pilot_19_evm[31:0]
// 21 pilot_20_evm[31:0]
// 22 pilot_21_evm[31:0]
// 23 pilot_22_evm[31:0]
// 24 pilot_23_evm[31:0]
// 25 pilot_24_evm[31:0]
// 26 pilot_25_evm[31:0]
// 27 pilot_26_evm[31:0]
// 28 pilot_27_evm[31:0]
// 29 pilot_28_evm[31:0]
// 30 pilot_29_evm[31:0]
// 31 pilot_30_evm[31:0]
// 32 pilot_31_evm[31:0]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS 33
struct phyrx_other_receive_info_su_evm_details {
uint32_t number_of_symbols : 16, //[15:0]
nss_count : 8, //[23:16]
pilot_count : 8; //[31:24]
uint32_t pilot_0_evm : 32; //[31:0]
uint32_t pilot_1_evm : 32; //[31:0]
uint32_t pilot_2_evm : 32; //[31:0]
uint32_t pilot_3_evm : 32; //[31:0]
uint32_t pilot_4_evm : 32; //[31:0]
uint32_t pilot_5_evm : 32; //[31:0]
uint32_t pilot_6_evm : 32; //[31:0]
uint32_t pilot_7_evm : 32; //[31:0]
uint32_t pilot_8_evm : 32; //[31:0]
uint32_t pilot_9_evm : 32; //[31:0]
uint32_t pilot_10_evm : 32; //[31:0]
uint32_t pilot_11_evm : 32; //[31:0]
uint32_t pilot_12_evm : 32; //[31:0]
uint32_t pilot_13_evm : 32; //[31:0]
uint32_t pilot_14_evm : 32; //[31:0]
uint32_t pilot_15_evm : 32; //[31:0]
uint32_t pilot_16_evm : 32; //[31:0]
uint32_t pilot_17_evm : 32; //[31:0]
uint32_t pilot_18_evm : 32; //[31:0]
uint32_t pilot_19_evm : 32; //[31:0]
uint32_t pilot_20_evm : 32; //[31:0]
uint32_t pilot_21_evm : 32; //[31:0]
uint32_t pilot_22_evm : 32; //[31:0]
uint32_t pilot_23_evm : 32; //[31:0]
uint32_t pilot_24_evm : 32; //[31:0]
uint32_t pilot_25_evm : 32; //[31:0]
uint32_t pilot_26_evm : 32; //[31:0]
uint32_t pilot_27_evm : 32; //[31:0]
uint32_t pilot_28_evm : 32; //[31:0]
uint32_t pilot_29_evm : 32; //[31:0]
uint32_t pilot_30_evm : 32; //[31:0]
uint32_t pilot_31_evm : 32; //[31:0]
};
/*
number_of_symbols
The number of symbols over which this EVM measurement
was done
<legal all>
nss_count
The number of Spatial Streams in this SU reception.
<legal 1-8>
pilot_count
The number of pilots captured per Spatial Stream in this
log
<legal 1-32>
pilot_0_evm
Example mapping of Nss and pilots to the evm fields:
With NSS_count = 2, Pilot_count = 3
Pilot_0_evm => NSS 0, Pilot 0
Pilot_1_evm => NSS 1, Pilot 0
Pilot_2_evm => NSS 0, Pilot 1
Pilot_3_evm => NSS 1, Pilot 1
Pilot_4_evm => NSS 0, Pilot 2
Pilot_5_evm => NSS 1, Pilot 2
<legal all>
pilot_1_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_2_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_3_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_4_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_5_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_6_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_7_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_8_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_9_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_10_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_11_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_12_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_13_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_14_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_15_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_16_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_17_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_18_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_19_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_20_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_21_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_22_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_23_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_24_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_25_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_26_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_27_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_28_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_29_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_30_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
pilot_31_evm
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_0_NUMBER_OF_SYMBOLS
The number of symbols over which this EVM measurement
was done
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_0_NUMBER_OF_SYMBOLS_OFFSET 0x00000000
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_0_NUMBER_OF_SYMBOLS_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_0_NUMBER_OF_SYMBOLS_MASK 0x0000ffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_0_NSS_COUNT
The number of Spatial Streams in this SU reception.
<legal 1-8>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_0_NSS_COUNT_OFFSET 0x00000000
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_0_NSS_COUNT_LSB 16
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_0_NSS_COUNT_MASK 0x00ff0000
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_0_PILOT_COUNT
The number of pilots captured per Spatial Stream in this
log
<legal 1-32>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_0_PILOT_COUNT_OFFSET 0x00000000
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_0_PILOT_COUNT_LSB 24
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_0_PILOT_COUNT_MASK 0xff000000
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_1_PILOT_0_EVM
Example mapping of Nss and pilots to the evm fields:
With NSS_count = 2, Pilot_count = 3
Pilot_0_evm => NSS 0, Pilot 0
Pilot_1_evm => NSS 1, Pilot 0
Pilot_2_evm => NSS 0, Pilot 1
Pilot_3_evm => NSS 1, Pilot 1
Pilot_4_evm => NSS 0, Pilot 2
Pilot_5_evm => NSS 1, Pilot 2
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_1_PILOT_0_EVM_OFFSET 0x00000004
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_1_PILOT_0_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_1_PILOT_0_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_2_PILOT_1_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_2_PILOT_1_EVM_OFFSET 0x00000008
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_2_PILOT_1_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_2_PILOT_1_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_3_PILOT_2_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_3_PILOT_2_EVM_OFFSET 0x0000000c
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_3_PILOT_2_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_3_PILOT_2_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_4_PILOT_3_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_4_PILOT_3_EVM_OFFSET 0x00000010
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_4_PILOT_3_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_4_PILOT_3_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_5_PILOT_4_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_5_PILOT_4_EVM_OFFSET 0x00000014
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_5_PILOT_4_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_5_PILOT_4_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_6_PILOT_5_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_6_PILOT_5_EVM_OFFSET 0x00000018
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_6_PILOT_5_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_6_PILOT_5_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_7_PILOT_6_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_7_PILOT_6_EVM_OFFSET 0x0000001c
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_7_PILOT_6_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_7_PILOT_6_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_8_PILOT_7_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_8_PILOT_7_EVM_OFFSET 0x00000020
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_8_PILOT_7_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_8_PILOT_7_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_9_PILOT_8_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_9_PILOT_8_EVM_OFFSET 0x00000024
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_9_PILOT_8_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_9_PILOT_8_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_10_PILOT_9_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_10_PILOT_9_EVM_OFFSET 0x00000028
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_10_PILOT_9_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_10_PILOT_9_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_11_PILOT_10_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_11_PILOT_10_EVM_OFFSET 0x0000002c
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_11_PILOT_10_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_11_PILOT_10_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_12_PILOT_11_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_12_PILOT_11_EVM_OFFSET 0x00000030
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_12_PILOT_11_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_12_PILOT_11_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_13_PILOT_12_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_13_PILOT_12_EVM_OFFSET 0x00000034
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_13_PILOT_12_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_13_PILOT_12_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_14_PILOT_13_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_14_PILOT_13_EVM_OFFSET 0x00000038
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_14_PILOT_13_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_14_PILOT_13_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_15_PILOT_14_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_15_PILOT_14_EVM_OFFSET 0x0000003c
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_15_PILOT_14_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_15_PILOT_14_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_16_PILOT_15_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_16_PILOT_15_EVM_OFFSET 0x00000040
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_16_PILOT_15_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_16_PILOT_15_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_17_PILOT_16_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_17_PILOT_16_EVM_OFFSET 0x00000044
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_17_PILOT_16_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_17_PILOT_16_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_18_PILOT_17_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_18_PILOT_17_EVM_OFFSET 0x00000048
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_18_PILOT_17_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_18_PILOT_17_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_19_PILOT_18_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_19_PILOT_18_EVM_OFFSET 0x0000004c
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_19_PILOT_18_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_19_PILOT_18_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_20_PILOT_19_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_20_PILOT_19_EVM_OFFSET 0x00000050
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_20_PILOT_19_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_20_PILOT_19_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_21_PILOT_20_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_21_PILOT_20_EVM_OFFSET 0x00000054
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_21_PILOT_20_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_21_PILOT_20_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_22_PILOT_21_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_22_PILOT_21_EVM_OFFSET 0x00000058
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_22_PILOT_21_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_22_PILOT_21_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_23_PILOT_22_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_23_PILOT_22_EVM_OFFSET 0x0000005c
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_23_PILOT_22_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_23_PILOT_22_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_24_PILOT_23_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_24_PILOT_23_EVM_OFFSET 0x00000060
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_24_PILOT_23_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_24_PILOT_23_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_25_PILOT_24_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_25_PILOT_24_EVM_OFFSET 0x00000064
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_25_PILOT_24_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_25_PILOT_24_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_26_PILOT_25_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_26_PILOT_25_EVM_OFFSET 0x00000068
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_26_PILOT_25_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_26_PILOT_25_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_27_PILOT_26_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_27_PILOT_26_EVM_OFFSET 0x0000006c
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_27_PILOT_26_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_27_PILOT_26_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_28_PILOT_27_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_28_PILOT_27_EVM_OFFSET 0x00000070
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_28_PILOT_27_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_28_PILOT_27_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_29_PILOT_28_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_29_PILOT_28_EVM_OFFSET 0x00000074
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_29_PILOT_28_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_29_PILOT_28_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_30_PILOT_29_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_30_PILOT_29_EVM_OFFSET 0x00000078
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_30_PILOT_29_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_30_PILOT_29_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_31_PILOT_30_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_31_PILOT_30_EVM_OFFSET 0x0000007c
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_31_PILOT_30_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_31_PILOT_30_EVM_MASK 0xffffffff
/* Description PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_32_PILOT_31_EVM
See Pilot_0_evm descriptions details for mapping info
<legal all>
*/
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_32_PILOT_31_EVM_OFFSET 0x00000080
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_32_PILOT_31_EVM_LSB 0
#define PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_32_PILOT_31_EVM_MASK 0xffffffff
#endif // _PHYRX_OTHER_RECEIVE_INFO_SU_EVM_DETAILS_H_

1901
hw/qca8074/v2/phyrx_pkt_end_info.h Normal file
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1181
hw/qca8074/v2/reo_entrance_ring.h Normal file
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16
hw/qca8074/v2/wcss_version.h Normal file
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@ -0,0 +1,16 @@
/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#define WCSS_VERSION 1057