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iio: adc: rockchip_saradc: reset saradc controller before programming it

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SARADC controller needs to be reset before programming it, otherwise
it will not function properly.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Jonathan Cameron <jic23@kernel.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-iio@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Tested-by: Guenter Roeck <linux@roeck-us.net>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Caesar Wang 2016-07-27 22:24:04 +08:00 committed by Jonathan Cameron
parent 7ac61a062f
commit 543852af8e
3 changed files with 38 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
View File

@ -16,6 +16,11 @@ Required properties:
- vref-supply: The regulator supply ADC reference voltage. - vref-supply: The regulator supply ADC reference voltage.
- #io-channel-cells: Should be 1, see ../iio-bindings.txt - #io-channel-cells: Should be 1, see ../iio-bindings.txt
Optional properties:
- resets: Must contain an entry for each entry in reset-names if need support
this option. See ../reset/reset.txt for details.
- reset-names: Must include the name "saradc-apb".
Example: Example:
saradc: saradc@2006c000 { saradc: saradc@2006c000 {
compatible = "rockchip,saradc"; compatible = "rockchip,saradc";
@ -23,6 +28,8 @@ Example:
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
clock-names = "saradc", "apb_pclk"; clock-names = "saradc", "apb_pclk";
resets = <&cru SRST_SARADC>;
reset-names = "saradc-apb";
#io-channel-cells = <1>; #io-channel-cells = <1>;
vref-supply = <&vcc18>; vref-supply = <&vcc18>;
}; };

1
drivers/iio/adc/Kconfig
View File

@ -389,6 +389,7 @@ config QCOM_SPMI_VADC
config ROCKCHIP_SARADC config ROCKCHIP_SARADC
tristate "Rockchip SARADC driver" tristate "Rockchip SARADC driver"
depends on ARCH_ROCKCHIP || (ARM && COMPILE_TEST) depends on ARCH_ROCKCHIP || (ARM && COMPILE_TEST)
depends on RESET_CONTROLLER
help help
Say yes here to build support for the SARADC found in SoCs from Say yes here to build support for the SARADC found in SoCs from
Rockchip. Rockchip.

30
drivers/iio/adc/rockchip_saradc.c
View File

@ -21,6 +21,8 @@
#include <linux/of_device.h> #include <linux/of_device.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/completion.h> #include <linux/completion.h>
#include <linux/delay.h>
#include <linux/reset.h>
#include <linux/regulator/consumer.h> #include <linux/regulator/consumer.h>
#include <linux/iio/iio.h> #include <linux/iio/iio.h>
@ -53,6 +55,7 @@ struct rockchip_saradc {
struct clk *clk; struct clk *clk;
struct completion completion; struct completion completion;
struct regulator *vref; struct regulator *vref;
struct reset_control *reset;
const struct rockchip_saradc_data *data; const struct rockchip_saradc_data *data;
u16 last_val; u16 last_val;
}; };
@ -190,6 +193,16 @@ static const struct of_device_id rockchip_saradc_match[] = {
}; };
MODULE_DEVICE_TABLE(of, rockchip_saradc_match); MODULE_DEVICE_TABLE(of, rockchip_saradc_match);
/**
* Reset SARADC Controller.
*/
static void rockchip_saradc_reset_controller(struct reset_control *reset)
{
reset_control_assert(reset);
usleep_range(10, 20);
reset_control_deassert(reset);
}
static int rockchip_saradc_probe(struct platform_device *pdev) static int rockchip_saradc_probe(struct platform_device *pdev)
{ {
struct rockchip_saradc *info = NULL; struct rockchip_saradc *info = NULL;
@ -218,6 +231,20 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
if (IS_ERR(info->regs)) if (IS_ERR(info->regs))
return PTR_ERR(info->regs); return PTR_ERR(info->regs);
/*
* The reset should be an optional property, as it should work
* with old devicetrees as well
*/
info->reset = devm_reset_control_get(&pdev->dev, "saradc-apb");
if (IS_ERR(info->reset)) {
ret = PTR_ERR(info->reset);
if (ret != -ENOENT)
return ret;
dev_dbg(&pdev->dev, "no reset control found\n");
info->reset = NULL;
}
init_completion(&info->completion); init_completion(&info->completion);
irq = platform_get_irq(pdev, 0); irq = platform_get_irq(pdev, 0);
@ -252,6 +279,9 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
return PTR_ERR(info->vref); return PTR_ERR(info->vref);
} }
if (info->reset)
rockchip_saradc_reset_controller(info->reset);
/* /*
* Use a default value for the converter clock. * Use a default value for the converter clock.
* This may become user-configurable in the future. * This may become user-configurable in the future.