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clocksource/drivers/imx-tpm: Fix next event not taking effect sometime
commit 3d5c2f8e75a55cfb11a85086c71996af0354a1fb upstream. The value written into the TPM CnV can only be updated into the hardware when the counter increases. Additional writes to the CnV write buffer are ignored until the register has been updated. Therefore, we need to check if the CnV has been updated before continuing. This may require waiting for 1 counter cycle in the worst case. Cc: stable@vger.kernel.org Fixes: 059ab7b82eec ("clocksource/drivers/imx-tpm: Add imx tpm timer support") Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jason Liu <jason.hui.liu@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240725193355.1436005-2-Frank.Li@nxp.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> (cherry picked from commit 143674856ebffeb785759892b1a11a7f5ecbd1f5) Signed-off-by: Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com> Signed-off-by: Vegard Nossum <vegard.nossum@oracle.com>
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@ -101,6 +101,14 @@ static int tpm_set_next_event(unsigned long delta,
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writel(next, timer_base + TPM_C0V);
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writel(next, timer_base + TPM_C0V);
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now = tpm_read_counter();
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now = tpm_read_counter();
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/*
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* Need to wait CNT increase at least 1 cycle to make sure
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* the C0V has been updated into HW.
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*/
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if ((next & 0xffffffff) != readl(timer_base + TPM_C0V))
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while (now == tpm_read_counter())
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;
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/*
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/*
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* NOTE: We observed in a very small probability, the bus fabric
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* NOTE: We observed in a very small probability, the bus fabric
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* contention between GPU and A7 may results a few cycles delay
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* contention between GPU and A7 may results a few cycles delay
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