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net: dsa: mv88e6xxx: prefix Port IEEE Priority mapping macros
For implicit namespacing and clarity, prefix the common Port IEEE Priority Remapping registers macros with MV88E6095_PORT_IEEE_PRIO. The 88E6390 family turned the 0x18 register into a single indirect table, document that at the same time. Document the register and prefer ordered hex masks values for all Marvell 16-bit registers. Also fix the following checkpatch checks with a temporary variable: CHECK: Alignment should match open parenthesis #65: FILE: drivers/net/dsa/mv88e6xxx/port.c:932: + err = mv88e6xxx_port_ieeepmt_write(chip, port, + MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_INGRESS_PCP, Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -900,11 +900,15 @@ int mv88e6095_port_tag_remap(struct mv88e6xxx_chip *chip, int port)
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int err;
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/* Use a direct priority mapping for all IEEE tagged frames */
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err = mv88e6xxx_port_write(chip, port, PORT_TAG_REGMAP_0123, 0x3210);
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err = mv88e6xxx_port_write(chip, port,
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MV88E6095_PORT_IEEE_PRIO_REMAP_0123,
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0x3210);
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if (err)
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return err;
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return mv88e6xxx_port_write(chip, port, PORT_TAG_REGMAP_4567, 0x7654);
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return mv88e6xxx_port_write(chip, port,
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MV88E6095_PORT_IEEE_PRIO_REMAP_4567,
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0x7654);
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}
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static int mv88e6xxx_port_ieeepmt_write(struct mv88e6xxx_chip *chip,
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@ -913,40 +917,39 @@ static int mv88e6xxx_port_ieeepmt_write(struct mv88e6xxx_chip *chip,
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{
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u16 reg;
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reg = PORT_IEEE_PRIO_MAP_TABLE_UPDATE |
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reg = MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_UPDATE |
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table |
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(pointer << PORT_IEEE_PRIO_MAP_TABLE_POINTER_SHIFT) |
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(pointer << MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_POINTER_SHIFT) |
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data;
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return mv88e6xxx_port_write(chip, port, PORT_IEEE_PRIO_MAP_TABLE, reg);
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return mv88e6xxx_port_write(chip, port,
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MV88E6390_PORT_IEEE_PRIO_MAP_TABLE, reg);
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}
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int mv88e6390_port_tag_remap(struct mv88e6xxx_chip *chip, int port)
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{
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int err, i;
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u16 table;
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for (i = 0; i <= 7; i++) {
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err = mv88e6xxx_port_ieeepmt_write(
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chip, port, PORT_IEEE_PRIO_MAP_TABLE_INGRESS_PCP,
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i, (i | i << 4));
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table = MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_INGRESS_PCP;
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err = mv88e6xxx_port_ieeepmt_write(chip, port, table, i,
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(i | i << 4));
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if (err)
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return err;
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err = mv88e6xxx_port_ieeepmt_write(
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chip, port, PORT_IEEE_PRIO_MAP_TABLE_EGRESS_GREEN_PCP,
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i, i);
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table = MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_GREEN_PCP;
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err = mv88e6xxx_port_ieeepmt_write(chip, port, table, i, i);
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if (err)
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return err;
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err = mv88e6xxx_port_ieeepmt_write(
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chip, port, PORT_IEEE_PRIO_MAP_TABLE_EGRESS_YELLOW_PCP,
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i, i);
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table = MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_YELLOW_PCP;
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err = mv88e6xxx_port_ieeepmt_write(chip, port, table, i, i);
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if (err)
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return err;
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err = mv88e6xxx_port_ieeepmt_write(
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chip, port, PORT_IEEE_PRIO_MAP_TABLE_EGRESS_AVB_PCP,
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i, i);
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table = MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_AVB_PCP;
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err = mv88e6xxx_port_ieeepmt_write(chip, port, table, i, i);
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if (err)
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return err;
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}
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@ -199,18 +199,24 @@
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#define PORT_IN_DISCARD_HI 0x11
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#define PORT_IN_FILTERED 0x12
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#define PORT_OUT_FILTERED 0x13
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#define PORT_TAG_REGMAP_0123 0x18
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#define PORT_TAG_REGMAP_4567 0x19
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#define PORT_IEEE_PRIO_MAP_TABLE 0x18 /* 6390 */
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#define PORT_IEEE_PRIO_MAP_TABLE_UPDATE BIT(15)
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#define PORT_IEEE_PRIO_MAP_TABLE_INGRESS_PCP (0x0 << 12)
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#define PORT_IEEE_PRIO_MAP_TABLE_EGRESS_GREEN_PCP (0x1 << 12)
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#define PORT_IEEE_PRIO_MAP_TABLE_EGRESS_YELLOW_PCP (0x2 << 12)
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#define PORT_IEEE_PRIO_MAP_TABLE_EGRESS_AVB_PCP (0x3 << 12)
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#define PORT_IEEE_PRIO_MAP_TABLE_EGRESS_GREEN_DSCP (0x5 << 12)
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#define PORT_IEEE_PRIO_MAP_TABLE_EGRESS_YELLOW_DSCP (0x6 << 12)
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#define PORT_IEEE_PRIO_MAP_TABLE_EGRESS_AVB_DSCP (0x7 << 12)
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#define PORT_IEEE_PRIO_MAP_TABLE_POINTER_SHIFT 9
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/* Offset 0x18: IEEE Priority Mapping Table */
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#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE 0x18
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#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_UPDATE 0x8000
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#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_INGRESS_PCP 0x0000
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#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_GREEN_PCP 0x1000
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#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_YELLOW_PCP 0x2000
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#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_AVB_PCP 0x3000
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#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_GREEN_DSCP 0x5000
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#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_YELLOW_DSCP 0x6000
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#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_AVB_DSCP 0x7000
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#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_POINTER_SHIFT 9
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/* Offset 0x18: Port IEEE Priority Remapping Registers (0-3) */
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#define MV88E6095_PORT_IEEE_PRIO_REMAP_0123 0x18
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/* Offset 0x19: Port IEEE Priority Remapping Registers (4-7) */
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#define MV88E6095_PORT_IEEE_PRIO_REMAP_4567 0x19
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int mv88e6xxx_port_read(struct mv88e6xxx_chip *chip, int port, int reg,
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u16 *val);
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