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irqchip: mips-gic: Remove gic_get_usm_range()

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The MIPS VDSO code is no longer reliant upon the irqchip driver to
provide the address of the GIC's user-visible section via
gic_get_usm_range(). Remove the now-dead code.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17041/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Paul Burton 2017-08-12 21:36:31 -07:00 committed by Ralf Baechle
parent 00578cd864
commit 84103814a2
2 changed files with 0 additions and 25 deletions
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14
drivers/irqchip/irq-mips-gic.c
View File

@ -46,7 +46,6 @@ struct gic_pcpu_mask {
DECLARE_BITMAP(pcpu_mask, GIC_MAX_INTRS); DECLARE_BITMAP(pcpu_mask, GIC_MAX_INTRS);
}; };
static unsigned long __gic_base_addr;
static struct gic_pcpu_mask pcpu_masks[NR_CPUS]; static struct gic_pcpu_mask pcpu_masks[NR_CPUS];
static DEFINE_SPINLOCK(gic_lock); static DEFINE_SPINLOCK(gic_lock);
static struct irq_domain *gic_irq_domain; static struct irq_domain *gic_irq_domain;
@ -134,17 +133,6 @@ int gic_get_c0_fdc_int(void)
GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_FDC)); GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_FDC));
} }
int gic_get_usm_range(struct resource *gic_usm_res)
{
if (!gic_present)
return -1;
gic_usm_res->start = __gic_base_addr + USM_VISIBLE_SECTION_OFS;
gic_usm_res->end = gic_usm_res->start + (USM_VISIBLE_SECTION_SIZE - 1);
return 0;
}
static void gic_handle_shared_int(bool chained) static void gic_handle_shared_int(bool chained)
{ {
unsigned int intr, virq; unsigned int intr, virq;
@ -672,8 +660,6 @@ static void __init __gic_init(unsigned long gic_base_addr,
unsigned int gicconfig, cpu; unsigned int gicconfig, cpu;
unsigned int v[2]; unsigned int v[2];
__gic_base_addr = gic_base_addr;
mips_gic_base = ioremap_nocache(gic_base_addr, gic_addrspace_size); mips_gic_base = ioremap_nocache(gic_base_addr, gic_addrspace_size);
gicconfig = read_gic_config(); gicconfig = read_gic_config();

11
include/linux/irqchip/mips-gic.h
View File

@ -11,10 +11,6 @@
#include <linux/clocksource.h> #include <linux/clocksource.h>
#include <linux/ioport.h> #include <linux/ioport.h>
/* GIC Address Space */
#define USM_VISIBLE_SECTION_OFS 0x10000
#define USM_VISIBLE_SECTION_SIZE 0x10000
/* User Mode Visible Section Register Map */ /* User Mode Visible Section Register Map */
#define GIC_UMV_SH_COUNTER_31_00_OFS 0x0000 #define GIC_UMV_SH_COUNTER_31_00_OFS 0x0000
#define GIC_UMV_SH_COUNTER_63_32_OFS 0x0004 #define GIC_UMV_SH_COUNTER_63_32_OFS 0x0004
@ -29,18 +25,11 @@ extern void gic_init(unsigned long gic_base_addr,
extern int gic_get_c0_compare_int(void); extern int gic_get_c0_compare_int(void);
extern int gic_get_c0_perfcount_int(void); extern int gic_get_c0_perfcount_int(void);
extern int gic_get_c0_fdc_int(void); extern int gic_get_c0_fdc_int(void);
extern int gic_get_usm_range(struct resource *gic_usm_res);
#else /* CONFIG_MIPS_GIC */ #else /* CONFIG_MIPS_GIC */
#define gic_present 0 #define gic_present 0
static inline int gic_get_usm_range(struct resource *gic_usm_res)
{
/* Shouldn't be called. */
return -1;
}
#endif /* CONFIG_MIPS_GIC */ #endif /* CONFIG_MIPS_GIC */
#endif /* __LINUX_IRQCHIP_MIPS_GIC_H */ #endif /* __LINUX_IRQCHIP_MIPS_GIC_H */