malhuda/msm-4.14
1
0
Fork 0
mirror of https://github.com/rd-stuffs/msm-4.14.git synced 2025-02-20 11:45:48 +08:00
Code Issues Actions Packages Projects Releases Wiki Activity

iommu/arm-smmu: Do not write to slave side protected context banks

Browse Source 
For msm targets that have slave side access control, iommu
driver is not allowed to write to secure context bank register
space. Extend arm_smmu_skip_write logic to consider such
protected context bank ttbr address space as well for skipping.

Change-Id: Ibb6ee5a0425c1aa86ab82b78eca386de09baaace
Signed-off-by: Vishwanath Raju K <vishk@codeaurora.org>
This commit is contained in:
Vishwanath Raju K 2020-07-28 12:58:08 +05:30
parent 9499b3ff29
commit 8e7a0d4061
1 changed files with 5 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
include/soc/qcom/msm_tz_smmu.h
View File

@ -62,11 +62,16 @@ extern void *get_smmu_from_addr(struct iommu_device *iommu, void __iomem *addr);
extern void *arm_smmu_get_by_addr(void __iomem *addr);
/* Donot write to smmu global space with CONFIG_MSM_TZ_SMMU */
#undef writel_relaxed
#undef writeq_relaxed
#define writel_relaxed(v, c) do { \
if (!arm_smmu_skip_write(c)) \
((void)__raw_writel((u32)cpu_to_le32(v), (c))); \
} while (0)
#define writeq_relaxed(v, c) do { \
if (!arm_smmu_skip_write(c)) \
((void)__raw_writeq((u64)cpu_to_le64(v), (c))); \
} while (0)
#else
static inline int msm_tz_smmu_atos_start(struct device *dev, int cb_num)