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staging: comedi: ni_660x: refactor GPCT_OFFSET

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This driver supports boards that have 1 or 2 TIO chips with base
addresses 0x800 apart. Replace the static const array 'GPCT_OFFSET'
with a define and calculate the base address based on the chip index.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten 2016-03-22 11:10:52 -07:00 committed by Greg Kroah-Hartman
parent 80c67b37fc
commit 8f266d508c
1 changed files with 5 additions and 5 deletions
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10
drivers/staging/comedi/drivers/ni_660x.c
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@ -204,9 +204,7 @@ static const struct ni_660x_register_data ni_660x_reg_data[NI660X_NUM_REGS] = {
[NI660X_IO_CFG_38_39] = { 0x7a2, 2 } /* read/write */
};
/* Offset of the GPCT chips from the base-address of the card */
/* First chip is at base-address + 0x00, etc. */
static const unsigned GPCT_OFFSET[2] = { 0x0, 0x800 };
#define NI660X_CHIP_OFFSET 0x800
enum ni_660x_boardid {
BOARD_PCI6601,
@ -271,7 +269,8 @@ struct ni_660x_private {
static void ni_660x_write(struct comedi_device *dev, unsigned int chip,
unsigned int bits, unsigned int reg)
{
unsigned int addr = GPCT_OFFSET[chip] + ni_660x_reg_data[reg].offset;
unsigned int addr = (chip * NI660X_CHIP_OFFSET) +
ni_660x_reg_data[reg].offset;
if (ni_660x_reg_data[reg].size == 2)
writew(bits, dev->mmio + addr);
@ -282,7 +281,8 @@ static void ni_660x_write(struct comedi_device *dev, unsigned int chip,
static unsigned int ni_660x_read(struct comedi_device *dev,
unsigned int chip, unsigned int reg)
{
unsigned int addr = GPCT_OFFSET[chip] + ni_660x_reg_data[reg].offset;
unsigned int addr = (chip * NI660X_CHIP_OFFSET) +
ni_660x_reg_data[reg].offset;
if (ni_660x_reg_data[reg].size == 2)
return readw(dev->mmio + addr);