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msm: kgsl: Add macrotiling channels property

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This change retrieves number of macrotiling channels from
device tree, configures the RBBM hardware accordingly, and
passes it to user as a property.

Change-Id: I8dce177451e7e2c0dd29dc9a91e99f0e63895a96
Signed-off-by: Hai Li <hali@codeaurora.org>
This commit is contained in:
Hai Li 2020-01-14 16:04:01 -05:00 committed by Gerrit - the friendly Code Review server
parent 92fc776b9a
commit 9499caf2a5
5 changed files with 43 additions and 4 deletions
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4
Documentation/devicetree/bindings/gpu/adreno.txt
View File

@ -190,6 +190,10 @@ Optional Properties:
Based on the ubwc mode, program the appropriate bit into
certain protected registers and also pass to the user as
a property.
- qcom,macrotiling-channels:
Specify the number of macrotiling channels for this chip.
This is programmed into certain registers and also pass to
the user as a property.
- qcom,l2pc-cpu-mask:
Disables L2PC on masked CPUs when any of Graphics
rendering thread is running on masked CPUs.

3
drivers/gpu/msm/a6xx_reg.h
View File

@ -1,4 +1,4 @@
/* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -400,6 +400,7 @@
#define A6XX_RBBM_PERFCTR_GPU_BUSY_MASKED 0x50B
#define A6XX_RBBM_ISDB_CNT 0x533
#define A6XX_RBBM_NC_MODE_CNTL 0x534
#define A6XX_RBBM_SECVID_TRUST_CNTL 0xF400
#define A6XX_RBBM_SECVID_TSB_TRUSTED_BASE_LO 0xF800

28
drivers/gpu/msm/adreno.c
View File

@ -1,4 +1,4 @@
/* Copyright (c) 2002,2007-2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2002,2007-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -2818,6 +2818,32 @@ static int adreno_getproperty(struct kgsl_device *device,
}
break;
case KGSL_PROP_MACROTILING_CHANNELS:
{
unsigned int channel;
if (sizebytes < sizeof(unsigned int)) {
status = -EINVAL;
break;
}
if (of_property_read_u32(device->pdev->dev.of_node,
"qcom,macrotiling-channels", &channel)) {
/* return error when not set in device tree
* and let user decide.
*/
status = -EINVAL;
break;
}
if (copy_to_user(value, &channel, sizeof(channel))) {
status = -EFAULT;
break;
}
status = 0;
}
break;
default:
status = -EINVAL;
}

11
drivers/gpu/msm/adreno_a6xx.c
View File

@ -1,4 +1,4 @@
/* Copyright (c)2017-2019, The Linux Foundation. All rights reserved.
/* Copyright (c)2017-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -784,7 +784,7 @@ static void a6xx_start(struct adreno_device *adreno_dev)
{
struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
struct gmu_dev_ops *gmu_dev_ops = GMU_DEVICE_OPS(device);
unsigned int bit, mal, mode, glbl_inv;
unsigned int bit, mal, mode, glbl_inv, channel;
unsigned int amsbc = 0;
static bool patch_reglist;
@ -885,6 +885,10 @@ static void a6xx_start(struct adreno_device *adreno_dev)
"qcom,ubwc-mode", &mode))
mode = 0;
if (of_property_read_u32(device->pdev->dev.of_node,
"qcom,macrotiling-channels", &channel))
channel = 0; /* unknown and keep reset value */
switch (mode) {
case KGSL_UBWC_1_0:
mode = 1;
@ -900,6 +904,9 @@ static void a6xx_start(struct adreno_device *adreno_dev)
break;
}
if (channel == 8)
kgsl_regwrite(device, A6XX_RBBM_NC_MODE_CNTL, 1);
if (bit >= 13 && bit <= 16)
bit = (bit - 13) & 0x03;
else

1
include/uapi/linux/msm_kgsl.h
View File

@ -338,6 +338,7 @@ enum kgsl_timestamp_type {
#define KGSL_PROP_SPEED_BIN 0x25
#define KGSL_PROP_GAMING_BIN 0x26
#define KGSL_PROP_CONTEXT_PROPERTY 0x28
#define KGSL_PROP_MACROTILING_CHANNELS 0x29
struct kgsl_shadowprop {