msm: mhi_dev: Update detecting BME during link enumeration

During PCIe enumeration the device waits for the Bus Master Enable
to be set by the host and currently polls for this bit to be set.
The host driver could take longer to enable the Bus Master Enable
and can cause the device to timeout when set to polling mode.
Therefore rely on the Bus Master Enable interrupt that is triggered
on the device after host set this bit.

Change-Id: I15b106ca0bc06a75370d1e1b4a83e2d39af97fb8
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
This commit is contained in:
Siddartha Mohanadoss 2020-04-10 00:34:51 -07:00
parent 4de5180f1f
commit aad261f5bb
2 changed files with 6 additions and 12 deletions

View File

@ -1915,16 +1915,10 @@ checkbme:
ep_pcie_bar0_address =
readl_relaxed(dev->dm_core + PCIE20_BAR0);
} else {
if (!(opt & EP_PCIE_OPT_ENUM_ASYNC))
EP_PCIE_ERR(dev,
"PCIe V%d: PCIe link is up but BME is still disabled after max waiting time\n",
dev->rev);
if (!ep_pcie_debug_keep_resource &&
!(opt&EP_PCIE_OPT_ENUM_ASYNC)) {
ret = EP_PCIE_ERROR;
dev->link_status = EP_PCIE_LINK_DISABLED;
goto link_fail;
}
EP_PCIE_DBG(dev,
"PCIe V%d: PCIe link is up but BME is disabled; current SW link status:%d\n",
dev->rev, dev->link_status);
dev->link_status = EP_PCIE_LINK_UP;
}
dev->suspending = false;

View File

@ -1,4 +1,4 @@
/* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.
/* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -1014,7 +1014,7 @@ static void mhi_sm_pcie_event_manager(struct work_struct *work)
spin_unlock_irqrestore(&mhi_sm_ctx->mhi_dev->lock, flags);
res = ep_pcie_enable_endpoint(mhi_sm_ctx->mhi_dev->phandle,
EP_PCIE_OPT_ENUM);
EP_PCIE_OPT_ENUM | EP_PCIE_OPT_ENUM_ASYNC);
if (res) {
MHI_SM_ERR("ep-pcie failed to link train, return %d\n",
res);