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devfreq_boost: Update and expand to handle CPUBW/LLCCBW boosting
This will enable us to more accurately replicate Pixel 4 userspace DDR boosting by adding support for both CPUBW and LLCCBW devices. https://android.googlesource.com/device/google/coral/+/refs/heads/master/init.power.rc https://android.googlesource.com/device/google/coral/+/refs/heads/master/powerhint.json Change-Id: Iae78fa01f96de8338725fa9309e5eee6d8c82313 Signed-off-by: idkwhoiam322 <idkwhoiam322@raphielgang.org> Signed-off-by: Richard Raya <rdxzv.dev@gmail.com>
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@ -288,17 +288,17 @@ config DEVFREQ_WAKE_BOOST_DURATION_MS
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help
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Wake boost duration in milliseconds for all boostable devices.
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config DEVFREQ_CPU_LLCC_DDR_BW_BOOST_FREQ
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int "Boost freq for cpu-llcc-ddr-bw device"
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config DEVFREQ_MSM_CPUBW_BOOST_FREQ
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int "Boost freq for cpubw device"
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default "0"
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help
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Boost frequency for the MSM DDR bus.
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CPUBW boost frequency for the MSM DDR bus.
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config DEVFREQ_CPU_CPU_LLCC_BW_BOOST_FREQ
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int "Boost freq for cpu-cpu-llcc-bw device"
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config DEVFREQ_MSM_LLCCBW_BOOST_FREQ
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int "Boost freq for llccbw device"
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default "0"
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help
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Boost frequency for the CPU LLCC bus.
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LLCCBW boost frequency for the MSM DDR bus.
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endif
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@ -50,10 +50,10 @@ static void devfreq_max_unboost(struct work_struct *work);
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}
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static struct df_boost_drv df_boost_drv_g __read_mostly = {
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BOOST_DEV_INIT(df_boost_drv_g, DEVFREQ_CPU_LLCC_DDR_BW,
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CONFIG_DEVFREQ_CPU_LLCC_DDR_BW_BOOST_FREQ),
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BOOST_DEV_INIT(df_boost_drv_g, DEVFREQ_CPU_CPU_LLCC_BW,
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CONFIG_DEVFREQ_CPU_CPU_LLCC_BW_BOOST_FREQ)
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BOOST_DEV_INIT(df_boost_drv_g, DEVFREQ_MSM_CPUBW,
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CONFIG_DEVFREQ_MSM_CPUBW_BOOST_FREQ),
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BOOST_DEV_INIT(df_boost_drv_g, DEVFREQ_MSM_LLCCBW,
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CONFIG_DEVFREQ_MSM_LLCCBW_BOOST_FREQ)
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};
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static void __devfreq_boost_kick(struct boost_dev *b)
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@ -238,11 +238,11 @@ int devfreq_add_devbw(struct device *dev)
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return PTR_ERR(d->df);
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}
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if (!strcmp(dev_name(dev), "soc:qcom,cpu-llcc-ddr-bw"))
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devfreq_register_boost_device(DEVFREQ_CPU_LLCC_DDR_BW, d->df);
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if (!strcmp(dev_name(dev), "soc:qcom,cpu-cpu-llcc-bw"))
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devfreq_register_boost_device(DEVFREQ_CPU_CPU_LLCC_BW, d->df);
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devfreq_register_boost_device(DEVFREQ_MSM_CPUBW, d->df);
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if (!strcmp(dev_name(dev), "soc:qcom,cpu-llcc-ddr-bw"))
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devfreq_register_boost_device(DEVFREQ_MSM_LLCCBW, d->df);
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return 0;
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}
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@ -2263,8 +2263,8 @@ static int __drm_mode_atomic_ioctl(struct drm_device *dev, void *data,
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return -EINVAL;
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if (!(arg->flags & DRM_MODE_ATOMIC_TEST_ONLY)) {
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devfreq_boost_kick(DEVFREQ_CPU_LLCC_DDR_BW);
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devfreq_boost_kick(DEVFREQ_CPU_CPU_LLCC_BW);
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devfreq_boost_kick(DEVFREQ_MSM_CPUBW);
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devfreq_boost_kick(DEVFREQ_MSM_LLCCBW);
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cpu_input_boost_kick();
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}
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@ -4370,8 +4370,8 @@ void sde_crtc_commit_kickoff(struct drm_crtc *crtc,
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SDE_ATRACE_BEGIN("crtc_commit");
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/* Boost when a new frame is ready to be committed */
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devfreq_boost_kick(DEVFREQ_CPU_LLCC_DDR_BW);
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devfreq_boost_kick(DEVFREQ_CPU_CPU_LLCC_BW);
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devfreq_boost_kick(DEVFREQ_MSM_CPUBW);
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devfreq_boost_kick(DEVFREQ_MSM_LLCCBW);
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cpu_input_boost_kick();
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is_error = _sde_crtc_prepare_for_kickoff_rot(dev, crtc);
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@ -9,8 +9,8 @@
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#include <linux/types.h>
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enum df_device {
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DEVFREQ_CPU_LLCC_DDR_BW,
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DEVFREQ_CPU_CPU_LLCC_BW,
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DEVFREQ_MSM_CPUBW,
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DEVFREQ_MSM_LLCCBW,
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DEVFREQ_MAX
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};
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@ -2249,8 +2249,8 @@ long _do_fork(unsigned long clone_flags,
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/* Boost to the max for 50 ms when userspace launches an app */
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if (task_is_zygote(current)) {
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devfreq_boost_kick_max(DEVFREQ_CPU_LLCC_DDR_BW, 50);
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devfreq_boost_kick_max(DEVFREQ_CPU_CPU_LLCC_BW, 50);
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devfreq_boost_kick_max(DEVFREQ_MSM_CPUBW, 50);
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devfreq_boost_kick_max(DEVFREQ_MSM_LLCCBW, 50);
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cpu_input_boost_kick_max(50);
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}
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@ -4326,8 +4326,8 @@ retry:
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wake_all_kswapds(order, ac);
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/* Boost when memory is low so allocation latency doesn't get too bad */
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devfreq_boost_kick_max(DEVFREQ_CPU_LLCC_DDR_BW, 100);
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devfreq_boost_kick_max(DEVFREQ_CPU_CPU_LLCC_BW, 100);
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devfreq_boost_kick_max(DEVFREQ_MSM_CPUBW, 100);
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devfreq_boost_kick_max(DEVFREQ_MSM_LLCCBW, 100);
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cpu_input_boost_kick_max(100);
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reserve_flags = __gfp_pfmemalloc_flags(gfp_mask);
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