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drm/i915: vlv: fix save/restore of GFX_MAX_REQ_COUNT reg
Due this typo we don't save/restore the GFX_MAX_REQ_COUNT register across suspend/resume, so fix this. This was introduced in commit ddeea5b0c36f3665446518c609be91f9336ef674 Author: Imre Deak <imre.deak@intel.com> Date: Mon May 5 15:19:56 2014 +0300 drm/i915: vlv: add runtime PM support I noticed this only by reading the code. To my knowledge it shouldn't cause any real problems at the moment, since the power well backing this register remains on across a runtime s/r. This may change once system-wide s0ix functionality is enabled in the kernel. v2: - resend after a missing git add -u :/ Cc: stable@vger.kernel.org Signed-off-by: Imre Deak <imre.deak@intel.com> Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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@ -1038,7 +1038,7 @@ static void vlv_save_gunit_s0ix_state(struct drm_i915_private *dev_priv)
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s->lra_limits[i] = I915_READ(GEN7_LRA_LIMITS_BASE + i * 4);
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s->media_max_req_count = I915_READ(GEN7_MEDIA_MAX_REQ_COUNT);
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s->gfx_max_req_count = I915_READ(GEN7_MEDIA_MAX_REQ_COUNT);
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s->gfx_max_req_count = I915_READ(GEN7_GFX_MAX_REQ_COUNT);
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s->render_hwsp = I915_READ(RENDER_HWS_PGA_GEN7);
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s->ecochk = I915_READ(GAM_ECOCHK);
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@ -1119,7 +1119,7 @@ static void vlv_restore_gunit_s0ix_state(struct drm_i915_private *dev_priv)
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I915_WRITE(GEN7_LRA_LIMITS_BASE + i * 4, s->lra_limits[i]);
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I915_WRITE(GEN7_MEDIA_MAX_REQ_COUNT, s->media_max_req_count);
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I915_WRITE(GEN7_MEDIA_MAX_REQ_COUNT, s->gfx_max_req_count);
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I915_WRITE(GEN7_GFX_MAX_REQ_COUNT, s->gfx_max_req_count);
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I915_WRITE(RENDER_HWS_PGA_GEN7, s->render_hwsp);
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I915_WRITE(GAM_ECOCHK, s->ecochk);
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