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msm: camera: cci: Fix logic to update cci clk freq

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When multiple frequency slaves running on a same I2C bus,
then there is a chance of overriding I2C bus frequency
even if another I2C operation is running. This could lead
to CCI timeout at driver level. Updated synchronization logic,
to properly update I2C clock frequency, only when no other
I2C operation running.

CRs-Fixed: 2800250
Change-Id: Ia341d7cda118497bf1acea8ea59f7f03124f31c3
Signed-off-by: Anil Kumar Kanakanti <akanakan@codeaurora.org>
Signed-off-by: Forenche <prahul2003@gmail.com>
Signed-off-by: azrim <mirzaspc@gmail.com>
This commit is contained in:
Anil Kumar Kanakanti 2020-12-26 19:17:16 +03:00 committed by azrim
parent c3db76993d
commit cb757e702d
No known key found for this signature in database
GPG Key ID: 497F8FB059B45D1C
3 changed files with 55 additions and 108 deletions
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156
drivers/media/platform/msm/camera/cam_sensor_module/cam_cci/cam_cci_core.c
View File

@ -567,19 +567,42 @@ static int32_t cam_cci_set_clk_param(struct cci_device *cci_dev,
struct cam_cci_clk_params_t *clk_params = NULL;
enum cci_i2c_master_t master = c_ctrl->cci_info->cci_i2c_master;
enum i2c_freq_mode i2c_freq_mode = c_ctrl->cci_info->i2c_freq_mode;
struct cam_hw_soc_info *soc_info =
&cci_dev->soc_info;
void __iomem *base = soc_info->reg_map[0].mem_base;
void __iomem *base = cci_dev->soc_info.reg_map[0].mem_base;
struct cam_cci_master_info *cci_master =
&cci_dev->cci_master_info[master];
if ((i2c_freq_mode >= I2C_MAX_MODES) || (i2c_freq_mode < 0)) {
CAM_ERR(CAM_CCI, "invalid i2c_freq_mode = %d", i2c_freq_mode);
return -EINVAL;
}
/*
* If no change in i2c freq, then acquire semaphore only for the first
* i2c transaction to indicate I2C transaction is in progress, else
* always try to acquire semaphore, to make sure that no other I2C
* transaction is in progress.
*/
mutex_lock(&cci_master->mutex);
if (i2c_freq_mode == cci_dev->i2c_freq_mode[master]) {
CAM_DBG(CAM_CCI, "Master: %d, curr_freq: %d", master,
i2c_freq_mode);
spin_lock(&cci_master->freq_cnt_lock);
if (cci_master->freq_ref_cnt == 0)
down(&cci_master->master_sem);
cci_master->freq_ref_cnt++;
spin_unlock(&cci_master->freq_cnt_lock);
mutex_unlock(&cci_master->mutex);
return 0;
}
CAM_DBG(CAM_CCI, "Master: %d, curr_freq: %d, req_freq: %d",
master, cci_dev->i2c_freq_mode[master], i2c_freq_mode);
down(&cci_master->master_sem);
spin_lock(&cci_master->freq_cnt_lock);
cci_master->freq_ref_cnt++;
spin_unlock(&cci_master->freq_cnt_lock);
clk_params = &cci_dev->cci_clk_params[i2c_freq_mode];
if (cci_dev->i2c_freq_mode[master] == i2c_freq_mode)
return 0;
if (master == MASTER_0) {
cam_io_w_mb(clk_params->hw_thigh << 16 |
clk_params->hw_tlow,
@ -613,6 +636,7 @@ static int32_t cam_cci_set_clk_param(struct cci_device *cci_dev,
}
cci_dev->i2c_freq_mode[master] = i2c_freq_mode;
mutex_unlock(&cci_master->mutex);
return 0;
}
@ -890,41 +914,17 @@ static int32_t cam_cci_burst_read(struct v4l2_subdev *sd,
return -EINVAL;
}
soc_info = &cci_dev->soc_info;
base = soc_info->reg_map[0].mem_base;
mutex_lock(&cci_dev->cci_master_info[master].mutex);
if (cci_dev->cci_master_info[master].is_first_req == true) {
cci_dev->cci_master_info[master].is_first_req = false;
CAM_DBG(CAM_CCI, "Master: %d, curr_freq: %d, req_freq: %d",
master, cci_dev->i2c_freq_mode[master],
c_ctrl->cci_info->i2c_freq_mode);
down(&cci_dev->cci_master_info[master].master_sem);
} else if (c_ctrl->cci_info->i2c_freq_mode
!= cci_dev->i2c_freq_mode[master]) {
CAM_DBG(CAM_CCI, "Master: %d, curr_freq: %d, req_freq: %d",
master, cci_dev->i2c_freq_mode[master],
c_ctrl->cci_info->i2c_freq_mode);
down(&cci_dev->cci_master_info[master].master_sem);
} else {
CAM_DBG(CAM_CCI, "Master: %d, curr_freq: %d, req_freq: %d",
master, cci_dev->i2c_freq_mode[master],
c_ctrl->cci_info->i2c_freq_mode);
spin_lock(&cci_dev->cci_master_info[master].freq_cnt);
cci_dev->cci_master_info[master].freq_ref_cnt++;
spin_unlock(&cci_dev->cci_master_info[master].freq_cnt);
}
/* Set the I2C Frequency */
rc = cam_cci_set_clk_param(cci_dev, c_ctrl);
if (rc < 0) {
CAM_ERR(CAM_CCI, "cam_cci_set_clk_param failed rc = %d", rc);
mutex_unlock(&cci_dev->cci_master_info[master].mutex);
goto rel_master;
return rc;
}
mutex_unlock(&cci_dev->cci_master_info[master].mutex);
mutex_lock(&cci_dev->cci_master_info[master].mutex_q[queue]);
soc_info = &cci_dev->soc_info;
base = soc_info->reg_map[0].mem_base;
/*
* Call validate queue to make sure queue is empty before starting.
* If this call fails, don't proceed with i2c_read call. This is to
@ -1120,13 +1120,11 @@ static int32_t cam_cci_burst_read(struct v4l2_subdev *sd,
rel_mutex_q:
mutex_unlock(&cci_dev->cci_master_info[master].mutex_q[queue]);
rel_master:
spin_lock(&cci_dev->cci_master_info[master].freq_cnt);
if (cci_dev->cci_master_info[master].freq_ref_cnt == 0)
spin_lock(&cci_dev->cci_master_info[master].freq_cnt_lock);
if (--cci_dev->cci_master_info[master].freq_ref_cnt == 0)
up(&cci_dev->cci_master_info[master].master_sem);
else
cci_dev->cci_master_info[master].freq_ref_cnt--;
spin_unlock(&cci_dev->cci_master_info[master].freq_cnt);
spin_unlock(&cci_dev->cci_master_info[master].freq_cnt_lock);
return rc;
}
@ -1151,45 +1149,23 @@ static int32_t cam_cci_read(struct v4l2_subdev *sd,
if (c_ctrl->cci_info->cci_i2c_master >= MASTER_MAX
|| c_ctrl->cci_info->cci_i2c_master < 0) {
CAM_ERR(CAM_CCI, "Invalid I2C master addr");
CAM_ERR(CAM_CCI, "Invalid I2C master addr:%d",
c_ctrl->cci_info->cci_i2c_master);
return -EINVAL;
}
soc_info = &cci_dev->soc_info;
base = soc_info->reg_map[0].mem_base;
mutex_lock(&cci_dev->cci_master_info[master].mutex);
if (cci_dev->cci_master_info[master].is_first_req == true) {
cci_dev->cci_master_info[master].is_first_req = false;
CAM_DBG(CAM_CCI, "Master: %d, curr_freq: %d, req_freq: %d",
master, cci_dev->i2c_freq_mode[master],
c_ctrl->cci_info->i2c_freq_mode);
down(&cci_dev->cci_master_info[master].master_sem);
} else if (c_ctrl->cci_info->i2c_freq_mode
!= cci_dev->i2c_freq_mode[master]) {
CAM_DBG(CAM_CCI, "Master: %d, curr_freq: %d, req_freq: %d",
master, cci_dev->i2c_freq_mode[master],
c_ctrl->cci_info->i2c_freq_mode);
down(&cci_dev->cci_master_info[master].master_sem);
} else {
CAM_DBG(CAM_CCI, "Master: %d, curr_freq: %d, req_freq: %d",
master, cci_dev->i2c_freq_mode[master],
c_ctrl->cci_info->i2c_freq_mode);
spin_lock(&cci_dev->cci_master_info[master].freq_cnt);
cci_dev->cci_master_info[master].freq_ref_cnt++;
spin_unlock(&cci_dev->cci_master_info[master].freq_cnt);
}
/* Set the I2C Frequency */
rc = cam_cci_set_clk_param(cci_dev, c_ctrl);
if (rc < 0) {
mutex_unlock(&cci_dev->cci_master_info[master].mutex);
CAM_ERR(CAM_CCI, "cam_cci_set_clk_param failed rc = %d", rc);
goto rel_master;
return rc;
}
mutex_unlock(&cci_dev->cci_master_info[master].mutex);
mutex_lock(&cci_dev->cci_master_info[master].mutex_q[queue]);
soc_info = &cci_dev->soc_info;
base = soc_info->reg_map[0].mem_base;
/*
* Call validate queue to make sure queue is empty before starting.
* If this call fails, don't proceed with i2c_read call. This is to
@ -1331,13 +1307,11 @@ static int32_t cam_cci_read(struct v4l2_subdev *sd,
}
rel_mutex_q:
mutex_unlock(&cci_dev->cci_master_info[master].mutex_q[queue]);
rel_master:
spin_lock(&cci_dev->cci_master_info[master].freq_cnt);
if (cci_dev->cci_master_info[master].freq_ref_cnt == 0)
spin_lock(&cci_dev->cci_master_info[master].freq_cnt_lock);
if (--cci_dev->cci_master_info[master].freq_ref_cnt == 0)
up(&cci_dev->cci_master_info[master].master_sem);
else
cci_dev->cci_master_info[master].freq_ref_cnt--;
spin_unlock(&cci_dev->cci_master_info[master].freq_cnt);
spin_unlock(&cci_dev->cci_master_info[master].freq_cnt_lock);
return rc;
}
@ -1361,36 +1335,12 @@ static int32_t cam_cci_i2c_write(struct v4l2_subdev *sd,
c_ctrl->cci_info->sid, c_ctrl->cci_info->retries,
c_ctrl->cci_info->id_map);
mutex_lock(&cci_dev->cci_master_info[master].mutex);
if (cci_dev->cci_master_info[master].is_first_req == true) {
cci_dev->cci_master_info[master].is_first_req = false;
CAM_DBG(CAM_CCI, "Master: %d, curr_freq: %d, req_freq: %d",
master, cci_dev->i2c_freq_mode[master],
c_ctrl->cci_info->i2c_freq_mode);
down(&cci_dev->cci_master_info[master].master_sem);
} else if (c_ctrl->cci_info->i2c_freq_mode
!= cci_dev->i2c_freq_mode[master]) {
CAM_DBG(CAM_CCI, "Master: %d, curr_freq: %d, req_freq: %d",
master, cci_dev->i2c_freq_mode[master],
c_ctrl->cci_info->i2c_freq_mode);
down(&cci_dev->cci_master_info[master].master_sem);
} else {
CAM_DBG(CAM_CCI, "Master: %d, curr_freq: %d, req_freq: %d",
master, cci_dev->i2c_freq_mode[master],
c_ctrl->cci_info->i2c_freq_mode);
spin_lock(&cci_dev->cci_master_info[master].freq_cnt);
cci_dev->cci_master_info[master].freq_ref_cnt++;
spin_unlock(&cci_dev->cci_master_info[master].freq_cnt);
}
/* Set the I2C Frequency */
rc = cam_cci_set_clk_param(cci_dev, c_ctrl);
if (rc < 0) {
CAM_ERR(CAM_CCI, "cam_cci_set_clk_param failed rc = %d", rc);
mutex_unlock(&cci_dev->cci_master_info[master].mutex);
goto ERROR;
return rc;
}
mutex_unlock(&cci_dev->cci_master_info[master].mutex);
/*
* Call validate queue to make sure queue is empty before starting.
* If this call fails, don't proceed with i2c_write call. This is to
@ -1415,12 +1365,10 @@ static int32_t cam_cci_i2c_write(struct v4l2_subdev *sd,
}
ERROR:
spin_lock(&cci_dev->cci_master_info[master].freq_cnt);
if (cci_dev->cci_master_info[master].freq_ref_cnt == 0)
spin_lock(&cci_dev->cci_master_info[master].freq_cnt_lock);
if (--cci_dev->cci_master_info[master].freq_ref_cnt == 0)
up(&cci_dev->cci_master_info[master].master_sem);
else
cci_dev->cci_master_info[master].freq_ref_cnt--;
spin_unlock(&cci_dev->cci_master_info[master].freq_cnt);
spin_unlock(&cci_dev->cci_master_info[master].freq_cnt_lock);
return rc;
}

3
drivers/media/platform/msm/camera/cam_sensor_module/cam_cci/cam_cci_dev.h
View File

@ -146,9 +146,8 @@ struct cam_cci_master_info {
struct completion report_q[NUM_QUEUES];
atomic_t done_pending[NUM_QUEUES];
spinlock_t lock_q[NUM_QUEUES];
spinlock_t freq_cnt;
struct semaphore master_sem;
bool is_first_req;
spinlock_t freq_cnt_lock;
uint16_t freq_ref_cnt;
};

4
drivers/media/platform/msm/camera/cam_sensor_module/cam_cci/cam_cci_soc.c
View File

@ -199,10 +199,10 @@ static void cam_cci_init_cci_params(struct cci_device *new_cci_dev)
for (i = 0; i < NUM_MASTERS; i++) {
new_cci_dev->cci_master_info[i].status = 0;
new_cci_dev->cci_master_info[i].is_first_req = true;
new_cci_dev->cci_master_info[i].freq_ref_cnt = 0;
mutex_init(&new_cci_dev->cci_master_info[i].mutex);
sema_init(&new_cci_dev->cci_master_info[i].master_sem, 1);
spin_lock_init(&new_cci_dev->cci_master_info[i].freq_cnt);
spin_lock_init(&new_cci_dev->cci_master_info[i].freq_cnt_lock);
init_completion(
&new_cci_dev->cci_master_info[i].reset_complete);
init_completion(