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msm: ipa4: Update IPA EP configuration to latest

Browse Source 
IPA 4.5 EP assignments and configuration updated to
accommodate recent supported use-cases. This change
integrate these updates.

CRs-Fixed: 2308523
Change-Id: I7d98a2c38268de8a17ff0ea3e813a5e1cc18a540
Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
This commit is contained in:
Ghanim Fodi 2018-08-05 15:41:31 +03:00 committed by Gerrit - the friendly Code Review server
parent 06e5ace9eb
commit e7e0818013
9 changed files with 83 additions and 113 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
drivers/platform/msm/gsi/gsi_reg.h
View File

@ -18,10 +18,17 @@ enum gsi_register_ver {
GSI_REGISTER_MAX,
};
#ifdef GSI_REGISTER_VER_CURRENT
#error GSI_REGISTER_VER_CURRENT already defined
#endif
#ifdef CONFIG_GSI_REGISTER_VERSION_2
#include "gsi_reg_v2.h"
#define GSI_REGISTER_VER_CURRENT GSI_REGISTER_VER_2
#else
#endif
/* The default is V1 */
#ifndef GSI_REGISTER_VER_CURRENT
#include "gsi_reg_v1.h"
#define GSI_REGISTER_VER_CURRENT GSI_REGISTER_VER_1
#endif

2
drivers/platform/msm/ipa/ipa_api.c
View File

@ -196,6 +196,8 @@ const char *ipa_clients_strings[IPA_CLIENT_MAX] = {
__stringify(IPA_CLIENT_MHI_DPL_CONS),
__stringify(RESERVERD_PROD_82),
__stringify(IPA_CLIENT_ODL_DPL_CONS),
__stringify(IPA_CLIENT_Q6_AUDIO_DMA_MHI_PROD),
__stringify(IPA_CLIENT_Q6_AUDIO_DMA_MHI_CONS),
};
/**

2
drivers/platform/msm/ipa/ipa_v3/ipa.c
View File

@ -3586,7 +3586,6 @@ void ipa3_enable_clks(void)
*/
void _ipa_disable_clks_v3_0(void)
{
ipa3_suspend_apps_pipes(true);
ipa3_uc_notify_clk_state(false);
if (ipa3_clk) {
IPADBG_LOW("disabling gcc_ipa_clk\n");
@ -3831,6 +3830,7 @@ static void __ipa3_dec_client_disable_clks(void)
ret = atomic_sub_return(1, &ipa3_ctx->ipa3_active_clients.cnt);
if (ret > 0)
goto unlock_mutex;
ipa3_suspend_apps_pipes(true);
ipa3_disable_clks();
unlock_mutex:

131
drivers/platform/msm/ipa/ipa_v3/ipa_utils.c
View File

@ -174,7 +174,6 @@
#define IPA_v4_2_DST_GROUP_MAX (1)
#define IPA_v4_5_MHI_GROUP_PCIE (0)
#define IPA_v4_5_ETHERNET (0)
#define IPA_v4_5_GROUP_UL_DL (1)
#define IPA_v4_5_MHI_GROUP_DDR (1)
#define IPA_v4_5_MHI_GROUP_DMA (2)
@ -462,14 +461,14 @@ static const struct rsrc_min_max ipa3_rsrc_dst_grp_config
{1, 63}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0} },
},
[IPA_4_5] = {
/* ETH UL/DL/DPL not used not used uC other are invalid */
/* not-used UL/DL/DPL not-used not-used uC other are invalid */
[IPA_v4_0_RSRC_GRP_TYPE_DST_DATA_SECTORS] = {
{16, 16}, {5, 5}, {0, 0}, {0, 0}, {0, 0}, {0, 0} },
{0, 0}, {5, 5}, {0, 0}, {0, 0}, {0, 0}, {0, 0} },
[IPA_v4_0_RSRC_GRP_TYPE_DST_DPS_DMARS] = {
{2, 63}, {1, 63}, {0, 0}, {0, 0}, {0, 2}, {0, 0} },
{0, 0}, {1, 63}, {0, 0}, {0, 0}, {0, 2}, {0, 0} },
},
[IPA_4_5_MHI] = {
/* PCIE/DPL DDR DMA QDSS uC other are invalid */
/* PCIE/DPL DDR DMA/CV2X QDSS uC other are invalid */
[IPA_v4_0_RSRC_GRP_TYPE_DST_DATA_SECTORS] = {
{16, 16}, {5, 5}, {2, 2}, {2, 2}, {0, 0}, {0, 0} },
[IPA_v4_0_RSRC_GRP_TYPE_DST_DPS_DMARS] = {
@ -2054,7 +2053,7 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
true,
IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP,
QMB_MASTER_SELECT_DDR,
{ 0, 10, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },
{ 0, 11, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },
[IPA_4_5][IPA_CLIENT_APPS_LAN_PROD] = {
true, IPA_v4_5_GROUP_UL_DL,
false,
@ -2066,13 +2065,13 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
true,
IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP,
QMB_MASTER_SELECT_DDR,
{ 2, 11, 16, 32, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } },
{ 2, 7, 16, 32, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } },
[IPA_4_5][IPA_CLIENT_APPS_CMD_PROD] = {
true, IPA_v4_5_GROUP_UL_DL,
false,
IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY,
QMB_MASTER_SELECT_DDR,
{ 7, 8, 20, 24, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } },
{ 7, 9, 20, 24, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } },
[IPA_4_5][IPA_CLIENT_ODU_PROD] = {
true, IPA_v4_5_GROUP_UL_DL,
true,
@ -2080,7 +2079,7 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
QMB_MASTER_SELECT_DDR,
{ 1, 0, 8, 16, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },
[IPA_4_5][IPA_CLIENT_ETHERNET_PROD] = {
true, IPA_v4_5_ETHERNET,
true, IPA_v4_5_GROUP_UL_DL,
true,
IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP,
QMB_MASTER_SELECT_DDR,
@ -2109,13 +2108,13 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
QMB_MASTER_SELECT_DDR,
{ 0, 10, 8, 16, IPA_EE_AP } },
{ 0, 11, 8, 16, IPA_EE_AP } },
[IPA_4_5][IPA_CLIENT_TEST1_PROD] = {
true, IPA_v4_5_GROUP_UL_DL,
true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
QMB_MASTER_SELECT_DDR,
{ 0, 10, 8, 16, IPA_EE_AP } },
{ 0, 11, 8, 16, IPA_EE_AP } },
[IPA_4_5][IPA_CLIENT_TEST2_PROD] = {
true, IPA_v4_5_GROUP_UL_DL,
true,
@ -2141,24 +2140,12 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_DDR,
{ 24, 3, 8, 14, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },
[IPA_4_5][IPA_CLIENT_WLAN2_CONS] = {
true, IPA_v4_5_GROUP_UL_DL,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_DDR,
{ 26, 18, 9, 9, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },
[IPA_4_5][IPA_CLIENT_WLAN3_CONS] = {
true, IPA_v4_5_GROUP_UL_DL,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_DDR,
{ 27, 19, 9, 9, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },
[IPA_4_5][IPA_CLIENT_USB_CONS] = {
true, IPA_v4_5_GROUP_UL_DL,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_DDR,
{ 25, 17, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },
{ 25, 16, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },
[IPA_4_5][IPA_CLIENT_USB_DPL_CONS] = {
true, IPA_v4_5_GROUP_UL_DL,
false,
@ -2170,7 +2157,7 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_DDR,
{ 16, 9, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },
{ 16, 10, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },
[IPA_4_5][IPA_CLIENT_APPS_WAN_CONS] = {
true, IPA_v4_5_GROUP_UL_DL,
false,
@ -2182,9 +2169,9 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_DDR,
{ 23, 16, 9, 9, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },
{ 23, 8, 9, 9, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },
[IPA_4_5][IPA_CLIENT_ETHERNET_CONS] = {
true, IPA_v4_5_ETHERNET,
true, IPA_v4_5_GROUP_UL_DL,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_DDR,
@ -2244,13 +2231,13 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_DDR,
{ 25, 17, 9, 9, IPA_EE_AP } },
{ 25, 16, 9, 9, IPA_EE_AP } },
[IPA_4_5][IPA_CLIENT_TEST4_CONS] = {
true, IPA_v4_5_GROUP_UL_DL,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_DDR,
{ 27, 19, 9, 9, IPA_EE_AP } },
{ 27, 18, 9, 9, IPA_EE_AP } },
/* Dummy consumer (pipe 31) is used in L2TP rt rule */
[IPA_4_5][IPA_CLIENT_DUMMY_CONS] = {
true, IPA_v4_5_GROUP_UL_DL,
@ -2260,18 +2247,12 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
{ 31, 31, 8, 8, IPA_EE_AP } },
/* IPA_4_5_MHI */
[IPA_4_5_MHI][IPA_CLIENT_APPS_WAN_PROD] = {
true, IPA_v4_5_MHI_GROUP_DDR,
true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
QMB_MASTER_SELECT_DDR,
{ 2, 11, 16, 32, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } },
[IPA_4_5_MHI][IPA_CLIENT_APPS_CMD_PROD] = {
true, IPA_v4_5_MHI_GROUP_DDR,
false,
IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY,
QMB_MASTER_SELECT_DDR,
{ 7, 8, 20, 24, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } },
{ 7, 9, 20, 24, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } },
[IPA_4_5_MHI][IPA_CLIENT_Q6_WAN_PROD] = {
true, IPA_v4_5_MHI_GROUP_DDR,
true,
@ -2290,6 +2271,12 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_DEC_UCP,
QMB_MASTER_SELECT_DDR,
{ 8, 2, 24, 32, IPA_EE_Q6, GSI_FREE_PRE_FETCH, 5 } },
[IPA_4_5_MHI][IPA_CLIENT_Q6_AUDIO_DMA_MHI_PROD] = {
true, IPA_v4_5_MHI_GROUP_DMA,
false,
IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_NO_UCP,
QMB_MASTER_SELECT_DDR,
{ 4, 6, 8, 16, IPA_EE_Q6, GSI_ESCAPE_BUF_ONLY, 0 } },
[IPA_4_5_MHI][IPA_CLIENT_MHI_PROD] = {
true, IPA_v4_5_MHI_GROUP_PCIE,
true,
@ -2314,38 +2301,14 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
QMB_MASTER_SELECT_DDR,
{ 0, 10, 8, 16, IPA_EE_AP } },
[IPA_4_5_MHI][IPA_CLIENT_TEST1_PROD] = {
true, IPA_v4_5_GROUP_UL_DL,
true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
QMB_MASTER_SELECT_DDR,
{ 0, 10, 8, 16, IPA_EE_AP } },
[IPA_4_5_MHI][IPA_CLIENT_TEST2_PROD] = {
true, IPA_v4_5_GROUP_UL_DL,
true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
QMB_MASTER_SELECT_DDR,
{ 1, 0, 8, 16, IPA_EE_AP } },
[IPA_4_5_MHI][IPA_CLIENT_TEST3_PROD] = {
true, IPA_v4_5_GROUP_UL_DL,
true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
QMB_MASTER_SELECT_DDR,
{ 9, 12, 8, 16, IPA_EE_AP } },
[IPA_4_5_MHI][IPA_CLIENT_TEST4_PROD] = {
true, IPA_v4_5_GROUP_UL_DL,
true,
IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
QMB_MASTER_SELECT_DDR,
{ 11, 13, 8, 16, IPA_EE_AP } },
{ 0, 11, 8, 16, IPA_EE_AP } },
[IPA_4_5_MHI][IPA_CLIENT_APPS_LAN_CONS] = {
true, IPA_v4_5_MHI_GROUP_DDR,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_DDR,
{ 16, 9, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },
{ 16, 10, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },
[IPA_4_5_MHI][IPA_CLIENT_Q6_LAN_CONS] = {
true, IPA_v4_5_MHI_GROUP_DDR,
false,
@ -2376,24 +2339,30 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_DDR,
{ 18, 4, 9, 9, IPA_EE_Q6, GSI_ESCAPE_BUF_ONLY, 0 } },
[IPA_4_5_MHI][IPA_CLIENT_Q6_AUDIO_DMA_MHI_CONS] = {
true, IPA_v4_5_MHI_GROUP_DMA,
false,
IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_NO_UCP,
QMB_MASTER_SELECT_DDR,
{ 29, 9, 9, 9, IPA_EE_Q6, GSI_SMART_PRE_FETCH, 4 } },
[IPA_4_5_MHI][IPA_CLIENT_MEMCPY_DMA_SYNC_CONS] = {
true, IPA_v4_5_MHI_GROUP_DMA,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_PCIE,
{ 26, 18, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },
{ 26, 17, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },
[IPA_4_5_MHI][IPA_CLIENT_MEMCPY_DMA_ASYNC_CONS] = {
true, IPA_v4_5_MHI_GROUP_DMA,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_PCIE,
{ 27, 19, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },
{ 27, 18, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },
[IPA_4_5_MHI][IPA_CLIENT_MHI_CONS] = {
true, IPA_v4_5_MHI_GROUP_PCIE,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_PCIE,
{ 14, 1, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },
{ 14, 1, 9, 9, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },
[IPA_4_5_MHI][IPA_CLIENT_MHI_DPL_CONS] = {
true, IPA_v4_5_MHI_GROUP_PCIE,
false,
@ -2401,38 +2370,6 @@ static const struct ipa_ep_configuration ipa3_ep_mapping
QMB_MASTER_SELECT_PCIE,
{ 22, 2, 5, 5, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },
/* Only for test purpose */
/* MBIM aggregation test pipes should have the same QMB as USB_CONS */
[IPA_4_5_MHI][IPA_CLIENT_TEST_CONS] = {
true, IPA_v4_5_GROUP_UL_DL,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_DDR,
{ 14, 1, 9, 9, IPA_EE_AP } },
[IPA_4_5_MHI][IPA_CLIENT_TEST1_CONS] = {
true, IPA_v4_5_GROUP_UL_DL,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_DDR,
{ 14, 1, 9, 9, IPA_EE_AP } },
[IPA_4_5_MHI][IPA_CLIENT_TEST2_CONS] = {
true, IPA_v4_5_GROUP_UL_DL,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_DDR,
{ 24, 3, 8, 14, IPA_EE_AP } },
[IPA_4_5_MHI][IPA_CLIENT_TEST3_CONS] = {
true, IPA_v4_5_GROUP_UL_DL,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_DDR,
{ 25, 17, 9, 9, IPA_EE_AP } },
[IPA_4_5_MHI][IPA_CLIENT_TEST4_CONS] = {
true, IPA_v4_5_GROUP_UL_DL,
false,
IPA_DPS_HPS_SEQ_TYPE_INVALID,
QMB_MASTER_SELECT_DDR,
{ 27, 18, 9, 9, IPA_EE_AP } },
/* Dummy consumer (pipe 31) is used in L2TP rt rule */
[IPA_4_5_MHI][IPA_CLIENT_DUMMY_CONS] = {
true, IPA_v4_5_GROUP_UL_DL,

1
drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal.h
View File

@ -535,6 +535,7 @@ enum ipahal_pkt_status_nat_type {
* the global flt tbl? (if not, then the per endp tables)
* @flt_ret_hdr: Retain header in filter rule flag: Does matching flt rule
* specifies to retain header?
* Starting IPA4.5, this will be true only if packet has L2 header.
* @flt_miss: Filtering miss flag: Was their a filtering rule miss?
* In case of miss, all flt info to be ignored
* @rt_local: Route table location flag: Does matching rt rule belongs to

1
drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_i.h
View File

@ -545,6 +545,7 @@ struct ipa_imm_cmd_hw_dma_task_32b_addr {
* the global flt tbl? (if not, then the per endp tables)
* @flt_ret_hdr: Retain header in filter rule flag: Does matching flt rule
* specifies to retain header?
* Starting IPA4.5, this will be true only if packet has L2 header.
* @flt_rule_id: The ID of the matching filter rule. This info can be combined
* with endp_src_idx to locate the exact rule. ID=0x3FF reserved to specify
* flt miss. In case of miss, all flt info to be ignored

28
drivers/platform/msm/ipa/ipa_v3/rmnet_ipa.c
View File

@ -1377,8 +1377,16 @@ static int handle3_egress_format(struct net_device *dev,
{
int rc;
struct ipa_sys_connect_params *ipa_wan_ep_cfg;
int ep_idx;
IPAWANDBG("get RMNET_IOCTL_SET_EGRESS_DATA_FORMAT\n");
ep_idx = ipa3_get_ep_mapping(IPA_CLIENT_APPS_WAN_PROD);
if (ep_idx == IPA_EP_NOT_ALLOCATED) {
IPAWANDBG("Embedded datapath not supported\n");
return -EFAULT;
}
ipa_wan_ep_cfg = &rmnet_ipa3_ctx->apps_to_ipa_ep_cfg;
if ((e->u.data) & RMNET_IOCTL_EGRESS_FORMAT_CHECKSUM) {
ipa_wan_ep_cfg->ipa_ep_cfg.hdr.hdr_len = 8;
@ -1492,7 +1500,7 @@ static int ipa3_wwan_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
uint32_t mux_id;
int8_t *v_name;
struct mutex *mux_mutex_ptr;
int wan_cons_ep;
int wan_ep;
IPAWANDBG("rmnet_ipa got ioctl number 0x%08x", cmd);
switch (cmd) {
@ -1618,17 +1626,23 @@ static int ipa3_wwan_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
/* Endpoint pair */
case RMNET_IOCTL_GET_EP_PAIR:
IPAWANDBG("get ioctl: RMNET_IOCTL_GET_EP_PAIR\n");
wan_cons_ep =
ipa3_get_ep_mapping(IPA_CLIENT_APPS_WAN_CONS);
if (wan_cons_ep == IPA_EP_NOT_ALLOCATED) {
wan_ep = ipa3_get_ep_mapping(IPA_CLIENT_APPS_WAN_CONS);
if (wan_ep == IPA_EP_NOT_ALLOCATED) {
IPAWANERR("Embedded datapath not supported\n");
rc = -EFAULT;
break;
}
ext_ioctl_data.u.ipa_ep_pair.producer_pipe_num =
wan_ep;
wan_ep = ipa3_get_ep_mapping(IPA_CLIENT_APPS_WAN_PROD);
if (wan_ep == IPA_EP_NOT_ALLOCATED) {
IPAWANERR("Embedded datapath not supported\n");
rc = -EFAULT;
break;
}
ext_ioctl_data.u.ipa_ep_pair.consumer_pipe_num =
ipa3_get_ep_mapping(IPA_CLIENT_APPS_WAN_PROD);
ext_ioctl_data.u.ipa_ep_pair.producer_pipe_num =
wan_cons_ep;
wan_ep;
if (copy_to_user((u8 *)ifr->ifr_ifru.ifru_data,
&ext_ioctl_data,
sizeof(struct rmnet_ioctl_extended_s)))

4
drivers/platform/msm/ipa/test/ipa_test_mhi.c
View File

@ -1571,7 +1571,7 @@ static int ipa_mhi_test_suspend(bool force, bool should_success)
if (should_success) {
if (p_ch_ctx_array->chstate !=
IPA_HW_MHI_CHANNEL_STATE_SUSPEND) {
IPA_UT_LOG("chstate is not suspend. ch %d chstate %s\n",
IPA_UT_LOG("chstate is not suspend! ch %d chstate %s\n",
IPA_MHI_TEST_FIRST_CHANNEL_ID + 1,
ipa_mhi_get_state_str(p_ch_ctx_array->chstate));
IPA_UT_TEST_FAIL_REPORT("channel state not suspend");
@ -1601,7 +1601,7 @@ static int ipa_mhi_test_suspend(bool force, bool should_success)
if (should_success) {
if (p_ch_ctx_array->chstate !=
IPA_HW_MHI_CHANNEL_STATE_SUSPEND) {
IPA_UT_LOG("chstate is not running! ch %d chstate %s\n",
IPA_UT_LOG("chstate is not suspend! ch %d chstate %s\n",
IPA_MHI_TEST_FIRST_CHANNEL_ID,
ipa_mhi_get_state_str(p_ch_ctx_array->chstate));
IPA_UT_TEST_FAIL_REPORT("channel state not suspend");

18
include/uapi/linux/msm_ipa.h
View File

@ -319,14 +319,18 @@ enum ipa_client_type {
/* RESERVERD PROD = 82, */
IPA_CLIENT_ODL_DPL_CONS = 83,
IPA_CLIENT_Q6_AUDIO_DMA_MHI_PROD = 84,
IPA_CLIENT_Q6_AUDIO_DMA_MHI_CONS = 85,
};
#define IPA_CLIENT_MAX (IPA_CLIENT_ODL_DPL_CONS + 1)
#define IPA_CLIENT_MAX (IPA_CLIENT_Q6_AUDIO_DMA_MHI_CONS + 1)
#define IPA_CLIENT_Q6_DL_NLO_DATA_PROD IPA_CLIENT_Q6_DL_NLO_DATA_PROD
#define IPA_CLIENT_Q6_UL_NLO_ACK_CONS IPA_CLIENT_Q6_UL_NLO_ACK_CONS
#define IPA_CLIENT_Q6_QBAP_STATUS_CONS IPA_CLIENT_Q6_QBAP_STATUS_CONS
#define IPA_CLIENT_MHI_DPL_CONS IPA_CLIENT_MHI_DPL_CONS
#define IPA_CLIENT_Q6_AUDIO_DMA_MHI_PROD IPA_CLIENT_Q6_AUDIO_DMA_MHI_PROD
#define IPA_CLIENT_Q6_AUDIO_DMA_MHI_CONS IPA_CLIENT_Q6_AUDIO_DMA_MHI_CONS
#define IPA_CLIENT_IS_APPS_CONS(client) \
((client) == IPA_CLIENT_APPS_LAN_CONS || \
@ -358,7 +362,8 @@ enum ipa_client_type {
(client) == IPA_CLIENT_Q6_LTE_WIFI_AGGR_CONS || \
(client) == IPA_CLIENT_Q6_UL_NLO_DATA_CONS || \
(client) == IPA_CLIENT_Q6_UL_NLO_ACK_CONS || \
(client) == IPA_CLIENT_Q6_QBAP_STATUS_CONS)
(client) == IPA_CLIENT_Q6_QBAP_STATUS_CONS || \
(client) == IPA_CLIENT_Q6_AUDIO_DMA_MHI_CONS)
#define IPA_CLIENT_IS_Q6_PROD(client) \
((client) == IPA_CLIENT_Q6_LAN_PROD || \
@ -366,7 +371,8 @@ enum ipa_client_type {
(client) == IPA_CLIENT_Q6_CMD_PROD || \
(client) == IPA_CLIENT_Q6_DECOMP_PROD || \
(client) == IPA_CLIENT_Q6_DECOMP2_PROD || \
(client) == IPA_CLIENT_Q6_DL_NLO_DATA_PROD)
(client) == IPA_CLIENT_Q6_DL_NLO_DATA_PROD || \
(client) == IPA_CLIENT_Q6_AUDIO_DMA_MHI_PROD)
#define IPA_CLIENT_IS_Q6_NON_ZIP_CONS(client) \
((client) == IPA_CLIENT_Q6_LAN_CONS || \
@ -375,7 +381,8 @@ enum ipa_client_type {
(client) == IPA_CLIENT_Q6_LTE_WIFI_AGGR_CONS || \
(client) == IPA_CLIENT_Q6_UL_NLO_DATA_CONS || \
(client) == IPA_CLIENT_Q6_UL_NLO_ACK_CONS || \
(client) == IPA_CLIENT_Q6_QBAP_STATUS_CONS)
(client) == IPA_CLIENT_Q6_QBAP_STATUS_CONS || \
(client) == IPA_CLIENT_Q6_AUDIO_DMA_MHI_CONS)
#define IPA_CLIENT_IS_Q6_ZIP_CONS(client) \
((client) == IPA_CLIENT_Q6_DECOMP_CONS || \
@ -385,7 +392,8 @@ enum ipa_client_type {
((client) == IPA_CLIENT_Q6_LAN_PROD || \
(client) == IPA_CLIENT_Q6_WAN_PROD || \
(client) == IPA_CLIENT_Q6_CMD_PROD || \
(client) == IPA_CLIENT_Q6_DL_NLO_DATA_PROD)
(client) == IPA_CLIENT_Q6_DL_NLO_DATA_PROD || \
(client) == IPA_CLIENT_Q6_AUDIO_DMA_MHI_PROD)
#define IPA_CLIENT_IS_Q6_ZIP_PROD(client) \
((client) == IPA_CLIENT_Q6_DECOMP_PROD || \