mirror of
https://github.com/rd-stuffs/msm-4.14.git
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staging:iio:adc:ad7152 bring more into line with abi.
Get rid of explicit writes to registers and conversion mode control. Couple of bits I'm unsure about. * Do calibration modes self reset when done? How do you tell they are done? * Should we poll the status register just to be sure we have a new conversion? All done sans hardware. Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk> Acked-by: Michael Hennerich <Michael.Hennerich@analog.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
parent
4050f49399
commit
ea993a5193
@ -13,6 +13,7 @@
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#include <linux/sysfs.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include "../iio.h"
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#include "../sysfs.h"
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@ -49,185 +50,72 @@
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struct ad7152_chip_info {
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struct i2c_client *client;
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u8 ch1_setup;
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u8 ch2_setup;
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/*
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* Capacitive channel digital filter setup;
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* conversion time/update rate setup per channel
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*/
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u8 filter_rate_setup;
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char *conversion_mode;
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};
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struct ad7152_conversion_mode {
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char *name;
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u8 reg_cfg;
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};
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static inline ssize_t ad7152_start_calib(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t len,
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u8 regval)
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{
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struct iio_dev *dev_info = dev_get_drvdata(dev);
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struct ad7152_chip_info *chip = iio_priv(dev_info);
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struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
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bool doit;
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int ret;
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static struct ad7152_conversion_mode
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ad7152_conv_mode_table[AD7152_MAX_CONV_MODE] = {
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{ "idle", 0 },
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{ "continuous-conversion", 1 },
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{ "single-conversion", 2 },
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{ "power-down", 3 },
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{ "offset-calibration", 5 },
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{ "gain-calibration", 6 },
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};
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ret = strtobool(buf, &doit);
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if (ret < 0)
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return ret;
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/*
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* sysfs nodes
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*/
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if (!doit)
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return 0;
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if (this_attr->address == 0)
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regval |= (1 << 4);
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else
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regval |= (1 << 3);
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ret = i2c_smbus_write_byte_data(chip->client, AD7152_CFG, regval);
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if (ret < 0)
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return ret;
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/* Unclear on period this should be set for or whether it flips back
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* to idle automatically */
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return len;
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}
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static ssize_t ad7152_start_offset_calib(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t len)
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{
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return ad7152_start_calib(dev, attr, buf, len, 5);
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}
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static ssize_t ad7152_start_gain_calib(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t len)
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{
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return ad7152_start_calib(dev, attr, buf, len, 6);
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}
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static IIO_DEVICE_ATTR(in_capacitance0_calibbias_calibration,
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S_IWUSR, NULL, ad7152_start_offset_calib, 0);
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static IIO_DEVICE_ATTR(in_capacitance1_calibbias_calibration,
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S_IWUSR, NULL, ad7152_start_offset_calib, 1);
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static IIO_DEVICE_ATTR(in_capacitance0_calibscale_calibration,
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S_IWUSR, NULL, ad7152_start_gain_calib, 0);
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static IIO_DEVICE_ATTR(in_capacitance1_calibscale_calibration,
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S_IWUSR, NULL, ad7152_start_gain_calib, 1);
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#define IIO_DEV_ATTR_AVAIL_CONVERSION_MODES(_show) \
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IIO_DEVICE_ATTR(available_conversion_modes, S_IRUGO, _show, NULL, 0)
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#define IIO_DEV_ATTR_CONVERSION_MODE(_mode, _show, _store) \
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IIO_DEVICE_ATTR(conversion_mode, _mode, _show, _store, 0)
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#define IIO_DEV_ATTR_CH1_SETUP(_mode, _show, _store) \
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IIO_DEVICE_ATTR(ch1_setup, _mode, _show, _store, 0)
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#define IIO_DEV_ATTR_CH2_SETUP(_mode, _show, _store) \
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IIO_DEVICE_ATTR(ch2_setup, _mode, _show, _store, 0)
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#define IIO_DEV_ATTR_FILTER_RATE_SETUP(_mode, _show, _store) \
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IIO_DEVICE_ATTR(filter_rate_setup, _mode, _show, _store, 0)
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static ssize_t ad7152_show_conversion_modes(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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int i;
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int len = 0;
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for (i = 0; i < AD7152_MAX_CONV_MODE; i++)
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len += sprintf(buf + len, "%s ",
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ad7152_conv_mode_table[i].name);
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len += sprintf(buf + len, "\n");
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return len;
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}
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static IIO_DEV_ATTR_AVAIL_CONVERSION_MODES(ad7152_show_conversion_modes);
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static ssize_t ad7152_show_conversion_mode(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct iio_dev *dev_info = dev_get_drvdata(dev);
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struct ad7152_chip_info *chip = iio_priv(dev_info);
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return sprintf(buf, "%s\n", chip->conversion_mode);
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}
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static ssize_t ad7152_store_conversion_mode(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t len)
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{
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struct iio_dev *dev_info = dev_get_drvdata(dev);
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struct ad7152_chip_info *chip = iio_priv(dev_info);
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u8 cfg;
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int i, ret;
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ret = i2c_smbus_read_byte_data(chip->client, AD7152_CFG);
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if (ret < 0)
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return ret;
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cfg = ret;
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for (i = 0; i < AD7152_MAX_CONV_MODE; i++)
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if (strncmp(buf, ad7152_conv_mode_table[i].name,
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strlen(ad7152_conv_mode_table[i].name) - 1) ==
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0) {
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chip->conversion_mode = ad7152_conv_mode_table[i].name;
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cfg |= 0x18 | ad7152_conv_mode_table[i].reg_cfg;
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ret = i2c_smbus_write_byte_data(chip->client,
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AD7152_CFG, cfg);
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if (ret < 0)
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return ret;
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return len;
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}
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dev_err(dev, "not supported conversion mode\n");
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return -EINVAL;
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}
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static IIO_DEV_ATTR_CONVERSION_MODE(S_IRUGO | S_IWUSR,
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ad7152_show_conversion_mode,
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ad7152_store_conversion_mode);
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static ssize_t ad7152_show_ch1_setup(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct iio_dev *dev_info = dev_get_drvdata(dev);
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struct ad7152_chip_info *chip = iio_priv(dev_info);
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return sprintf(buf, "0x%02x\n", chip->ch1_setup);
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}
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static ssize_t ad7152_store_ch1_setup(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t len)
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{
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struct iio_dev *dev_info = dev_get_drvdata(dev);
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struct ad7152_chip_info *chip = iio_priv(dev_info);
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u8 data;
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int ret;
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ret = kstrtou8(buf, 10, &data);
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if (ret < 0)
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return ret;
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ret = i2c_smbus_write_byte_data(chip->client, AD7152_CH1_SETUP, data);
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if (ret < 0)
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return ret;
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chip->ch1_setup = data;
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return len;
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}
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static IIO_DEV_ATTR_CH1_SETUP(S_IRUGO | S_IWUSR,
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ad7152_show_ch1_setup,
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ad7152_store_ch1_setup);
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static ssize_t ad7152_show_ch2_setup(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct iio_dev *dev_info = dev_get_drvdata(dev);
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struct ad7152_chip_info *chip = iio_priv(dev_info);
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return sprintf(buf, "0x%02x\n", chip->ch2_setup);
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}
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static ssize_t ad7152_store_ch2_setup(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t len)
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{
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struct iio_dev *dev_info = dev_get_drvdata(dev);
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struct ad7152_chip_info *chip = iio_priv(dev_info);
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u8 data;
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int ret;
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ret = kstrtou8(buf, 10, &data);
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if (ret < 0)
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return ret;
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ret = i2c_smbus_write_byte_data(chip->client, AD7152_CH2_SETUP, data);
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if (ret < 0)
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return ret;
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chip->ch2_setup = data;
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return len;
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}
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static IIO_DEV_ATTR_CH2_SETUP(S_IRUGO | S_IWUSR,
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ad7152_show_ch2_setup,
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ad7152_store_ch2_setup);
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static ssize_t ad7152_show_filter_rate_setup(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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@ -266,11 +154,11 @@ static IIO_DEV_ATTR_FILTER_RATE_SETUP(S_IRUGO | S_IWUSR,
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ad7152_store_filter_rate_setup);
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static struct attribute *ad7152_attributes[] = {
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&iio_dev_attr_available_conversion_modes.dev_attr.attr,
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&iio_dev_attr_conversion_mode.dev_attr.attr,
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&iio_dev_attr_ch1_setup.dev_attr.attr,
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&iio_dev_attr_ch2_setup.dev_attr.attr,
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&iio_dev_attr_filter_rate_setup.dev_attr.attr,
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&iio_dev_attr_in_capacitance0_calibbias_calibration.dev_attr.attr,
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&iio_dev_attr_in_capacitance1_calibbias_calibration.dev_attr.attr,
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&iio_dev_attr_in_capacitance0_calibscale_calibration.dev_attr.attr,
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&iio_dev_attr_in_capacitance1_calibscale_calibration.dev_attr.attr,
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NULL,
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};
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@ -278,10 +166,18 @@ static const struct attribute_group ad7152_attribute_group = {
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.attrs = ad7152_attributes,
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};
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static const u8 ad7152_addresses[][3] = {
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{ AD7152_CH1_DATA_HIGH, AD7152_CH1_OFFS_HIGH, AD7152_CH1_GAIN_HIGH },
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{ AD7152_CH2_DATA_HIGH, AD7152_CH2_OFFS_HIGH, AD7152_CH2_GAIN_HIGH },
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static const u8 ad7152_addresses[][4] = {
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{ AD7152_CH1_DATA_HIGH, AD7152_CH1_OFFS_HIGH,
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AD7152_CH1_GAIN_HIGH, AD7152_CH1_SETUP },
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{ AD7152_CH2_DATA_HIGH, AD7152_CH2_OFFS_HIGH,
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AD7152_CH2_GAIN_HIGH, AD7152_CH2_SETUP },
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};
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/* Values are micro relative to pf base. */
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static const int ad7152_scale_table[] = {
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488, 244, 122, 61
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};
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static int ad7152_write_raw(struct iio_dev *dev_info,
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struct iio_chan_spec const *chan,
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int val,
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@ -289,7 +185,7 @@ static int ad7152_write_raw(struct iio_dev *dev_info,
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long mask)
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{
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struct ad7152_chip_info *chip = iio_priv(dev_info);
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int ret;
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int ret, i;
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switch (mask) {
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case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE):
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@ -313,7 +209,24 @@ static int ad7152_write_raw(struct iio_dev *dev_info,
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return ret;
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return 0;
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case (1 << IIO_CHAN_INFO_SCALE_SEPARATE):
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if (val != 0)
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return -EINVAL;
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for (i = 0; i < ARRAY_SIZE(ad7152_scale_table); i++)
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if (val2 <= ad7152_scale_table[i])
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break;
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ret = i2c_smbus_read_byte_data(chip->client,
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ad7152_addresses[chan->channel][3]);
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if (ret < 0)
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return ret;
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if ((ret & 0xC0) != i)
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ret = i2c_smbus_write_byte_data(chip->client,
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ad7152_addresses[chan->channel][3],
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(ret & ~0xC0) | i);
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if (ret < 0)
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return ret;
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else
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return 0;
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default:
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return -EINVAL;
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}
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@ -325,14 +238,34 @@ static int ad7152_read_raw(struct iio_dev *dev_info,
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{
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struct ad7152_chip_info *chip = iio_priv(dev_info);
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int ret;
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u8 regval = 0;
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switch (mask) {
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case 0:
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/* First set whether in differential mode */
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if (chan->differential)
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regval = (1 << 5);
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/* Make sure the channel is enabled */
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if (chan->channel == 0)
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regval |= (1 << 4);
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else
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regval |= (1 << 3);
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/* Trigger a single read */
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regval |= 0x02;
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ret = i2c_smbus_write_byte_data(chip->client,
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ad7152_addresses[chan->channel][3],
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regval);
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if (ret < 0)
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return ret;
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msleep(60); /* Slowest conversion time */
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/* Now read the actual register */
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ret = i2c_smbus_read_word_data(chip->client,
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ad7152_addresses[chan->channel][0]);
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if (ret < 0)
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return ret;
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*val = ret;
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return IIO_VAL_INT;
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case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE):
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/* FIXME: Hmm. very small. it's 1+ 1/(2^16 *val) */
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@ -341,6 +274,7 @@ static int ad7152_read_raw(struct iio_dev *dev_info,
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if (ret < 0)
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return ret;
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*val = ret;
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return IIO_VAL_INT;
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case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE):
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ret = i2c_smbus_read_word_data(chip->client,
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@ -348,7 +282,17 @@ static int ad7152_read_raw(struct iio_dev *dev_info,
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if (ret < 0)
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return ret;
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*val = ret;
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return IIO_VAL_INT;
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case (1 << IIO_CHAN_INFO_SCALE_SEPARATE):
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ret = i2c_smbus_read_byte_data(chip->client,
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ad7152_addresses[chan->channel][3]);
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if (ret < 0)
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return ret;
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*val = 0;
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*val2 = ad7152_scale_table[ret >> 6];
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return IIO_VAL_INT_PLUS_MICRO;
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default:
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return -EINVAL;
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};
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@ -366,13 +310,33 @@ static const struct iio_chan_spec ad7152_channels[] = {
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.indexed = 1,
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.channel = 0,
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.info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) |
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(1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE),
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(1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) |
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(1 << IIO_CHAN_INFO_SCALE_SEPARATE),
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}, {
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.type = IIO_CAPACITANCE,
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.indexed = 1,
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.channel = 1,
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.info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) |
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(1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE),
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(1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) |
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(1 << IIO_CHAN_INFO_SCALE_SEPARATE),
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}, {
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.type = IIO_CAPACITANCE,
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.differential = 1,
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.indexed = 1,
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.channel = 0,
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.channel2 = 2,
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.info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) |
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(1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) |
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(1 << IIO_CHAN_INFO_SCALE_SEPARATE),
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}, {
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.type = IIO_CAPACITANCE,
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.differential = 1,
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.indexed = 1,
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.channel = 1,
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.channel2 = 3,
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.info_mask = (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE) |
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(1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE) |
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(1 << IIO_CHAN_INFO_SCALE_SEPARATE),
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}
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};
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/*
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@ -405,7 +369,7 @@ static int __devinit ad7152_probe(struct i2c_client *client,
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if (id->driver_data == 0)
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indio_dev->num_channels = ARRAY_SIZE(ad7152_channels);
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else
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indio_dev->num_channels = 1;
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indio_dev->num_channels = 2;
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indio_dev->num_channels = ARRAY_SIZE(ad7152_channels);
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indio_dev->modes = INDIO_DIRECT_MODE;
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