This change adds support of msm_power_ctrl ioctl from msm display
driver. This ioctl is required to enable/disable display power
before/after accessing display core registers by clients.
TZ asynchronously accesses display domain registers without display
driver knowledge.This ioctl provides any such clients capability
to add/remove vote on display core clocks and power rail.
Change-Id: Ibf564ee3ad44884da55bf8a1e62f9d409ecf947b
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Signed-off-by: Shubhashree Dhar <dhar@codeaurora.org>
fixes the C++ related compilation issues.
CRs-Fixed: 2038080
Change-Id: If6b4f379eb27f3de6153b8666f733c0b8245851f
Signed-off-by: Manoj Kumar AVM <manojavm@codeaurora.org>
Add support to provide hardware recovery event notification
to registered clients. It supports three events: capture, reset
and sucecess. Client can capture the debug log when it receives
"capture" event. It can hard reset the mdss core by turning off
all displays when it receives "reset" event. sde drm driver
provides "success" notification when recovery is successful.
Change-Id: Ieeb0fbf3ca6961e7056b9c909a63170cdd415751
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
Define HDR (High Dynamic Range) EOTF (Electro-Optical Transfer Function)
standard values that can be used by user modules.
Change-Id: I34b75630df8c668e37bdf3e23fa78b35f1d18560
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Use metadata information sent from userspace to configure sink.
This info is used later on to program the HDMI specific
infoframe registers.
CRs-Fixed: 2110071
Change-Id: I26634452d8c3ab7ab49a65e89ad52a3961c64855
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Populate HDR sink capabilities to a DRM blob.
These capabilities are used by the userspace
to calculate the sink HDR properties and set them.
CRs-Fixed: 2110071
Change-Id: I7c2dbca375c456052ad73889b011553090bcf8f1
Signed-off-by: Srikanth Rajagopalan <rasrik@codeaurora.org>
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Create ESD worker thread which periodically checks for
panel status. If panel health check is successful then
reschedule the work to be executed after a predefined delay.
If panel does not respond then PANEL_DEAD will reported to
user space to trigger the recovery procedure.
Change-Id: I58ab04dabd47b07ef6df80bdb9b22c20e087deec
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Snapshot of SDE driver. This includes DRM SDE, DP, and DSI drivers,
v4l2 rotator driver, and clk driver for display plls. Upstream changes
to drm/msm have been merged but require further fixes and validation
before enabling this driver. Snapshot was taken from msm-4.9 as of:
commit f54b6540b397 ("wil6210: add proper locking in cfg suspend")
Change-Id: Ied16c0c33d1321c96f080bc7dafe0ab302657861
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
__user should be used to identify user pointers and not __u64
variables containing pointers.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Modify the 'pad' member of struct drm_msm_gem_info to 'flags'. If the
user sets 'flags' to non-zero it means that they want a IOVA for the
GEM object instead of a mmap() offset. Return the iova in the 'offset'
member.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
[robclark: s/hint/flags in commit msg]
Signed-off-by: Rob Clark <robdclark@gmail.com>
The ioctl array is sparsely populated but the compiler will make sure
that it is sufficiently sized for all the values that we have so we
can safely use ARRAY_SIZE() instead of having a constantly changing
#define in the uapi header.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
User space needs to know where the GMEM whole starts so that they
can set up the addressing correctly.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
The same file in libdrm is, as is the tradition with the rest of libdrm,
etc, using an MIT license. To avoid complications in the future with
sync'ing the uapi header to libdrm, lets fix the license mismatch now
before there are any non-trivial commits from someone other than myself.
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Cc: Gabriel Laskar <gabriel@lse.epita.fr>
Cc: Mikko Rapeli <mikko.rapeli@iki.fi>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
We'll want to be able to pass in flags, such as asking for explicit
fencing, and possibly other things down the road. Fortunately we
don't need a full 32b for the pipe-id. So use the upper 16 bits
for flags (which could be extended or reduced later if needed, so
start adding flags from the high bits).
Since anything with the upper bits set would not be a valid pipe-id,
an old userspace would not set any of the upper bits, and an old
kernel would reject it as an invalid pipe-id.
Signed-off-by: Rob Clark <robdclark@gmail.com>
We need this for GL_TIMESTAMP queries.
Note: currently only supported on a4xx.. a3xx doesn't have this
always-on counter. I think we could emulate it with the one CP
counter that is available, but for now it is of limited usefulness
on a3xx (since we can't seem to do time-elapsed queries in any sane
way with the existing firmware on a3xx, and if you are trying to do
profiling on a tiler you want time-elapsed). We can add that later
if it becomes useful.
Signed-off-by: Rob Clark <robdclark@gmail.com>
We need this in userspace for interpreting some of the perf ctrs.
Note possibly not quite sufficient if we had some frequency mgmt
approach other than race-to-idle. Not really sure what the best
thing to do if we did. Although displaying results as a percentage
of max frequence seems sensible(ish) if we did.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Using `#include "drm.h"` instead of `#include <drm/drm.h>` allow drm
headers to be moved in another directory without changes, like for the
libdrm imports.
Signed-off-by: Gabriel Laskar <gabriel@lse.epita.fr>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
CC: Emil Velikov <emil.l.velikov@gmail.com>
CC: Mikko Rapeli <mikko.rapeli@iki.fi>
Fixes userspace compilation errors like:
error: unknown type name ‘uint32_t’
Signed-off-by: Mikko Rapeli <mikko.rapeli@iki.fi>
Signed-off-by: Rob Clark <robdclark@gmail.com>
After reading a nice article on LWN[1], I went back and double checked
my handling of invalid-input checking. Turns out there were a couple
places I had missed.
Since the driver is fairly young, and the devices it supports are really
only just barely usable for basic stuff (serial console) with an
upstream kernel, I think we should fix this now and revert specific
parts of this patch later in the unlikely event that a regression is
reported.
[1] https://lwn.net/Articles/588444/
Signed-off-by: Rob Clark <robdclark@gmail.com>
Some of the w/a or different behavior of userspace blob driver seem to
be keyed to gpu patch revision, rather than gpu-id. So expose the full
chip-id to userspace so it can DTRT.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Add initial support for a3xx 3d core.
So far, with hardware that I've seen to date, we can have:
+ zero, one, or two z180 2d cores
+ a3xx or a2xx 3d core, which share a common CP (the firmware
for the CP seems to implement some different PM4 packet types
but the basics of cmdstream submission are the same)
Which means that the eventual complete "class" hierarchy, once
support for all past and present hw is in place, becomes:
+ msm_gpu
+ adreno_gpu
+ a3xx_gpu
+ a2xx_gpu
+ z180_gpu
This commit splits out the parts that will eventually be common
between a2xx/a3xx into adreno_gpu, and the parts that are even
common to z180 into msm_gpu.
Note that there is no cmdstream validation required. All memory access
from the GPU is via IOMMU/MMU. So as long as you don't map silly things
to the GPU, there isn't much damage that the GPU can do.
Signed-off-by: Rob Clark <robdclark@gmail.com>
