Add an implementation of the SCM interface that works on ARM64 SoCs. This
is used by things like determine if we have HDCP support or not on the
system.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
This patch converts the Qualcomm SCM driver to use the streaming DMA APIs
for communication buffers. This is being done so that the
secure_flush_area call can be removed. Using the DMA APIs will also make
the SCM32 symmetric to the coming SCM64 code.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
This patch converts the Qualcomm SCM firmware driver into a platform
driver. It also adds clock management for firmware calls which require
clocks to be enabled during the duration of their execution. Rate
setting of the core clock is also in place for higher performance.
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
HDCP driver needs to check if secure environment supports HDCP. If it's
supported, then it requires to program some registers through SCM.
Add qcom_scm_hdcp_available and qcom_scm_hdcp_req to support these
requirements.
Signed-off-by: Jilai Wang <jilaiw@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Split out the 32-bit SCM implementation into its own file to prep for
supporting a 64-bit/ARM64 implementation as well. We create a simple shim
to ensure both versions conform to the same interface.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Support powering down the calling cpu, by trapping into SCM. This
termination function triggers the ARM cpu to execute WFI instruction,
causing the power controller to safely power the cpu down.
Caches may be flushed before powering down the cpu. If cache controller
is set to turn off when the cpu is powered down, then the flags argument
indicates to the secure mode to flush its cache lines before executing
WFI.The warm boot reset address for the cpu should be set before the
calling into this function for the cpu to resume.
The original code for the qcom_scm_call_atomic1() comes from a patch by
Stephen Boyd [1]. The function scm_call_atomic1() has been cherry picked
and renamed to match the convention used in this file. Since there are
no users of scm_call_atomic2(), the function is not included.
[1]. https://lkml.org/lkml/2014/8/4/765
Signed-off-by: Stephen Boyd <sboyd@codeauraro.org>
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
A core can be powered down for cpuidle or when it is hotplugged off. In
either case, the warmboot return address would be different. Allow
setting the warmboot address for a specific cpu, optimize and write to
the firmware, if the address is different than the previously set
address.
Export qcom_scm_set_warm_boot_addr function move the warm boot flags to
implementation.
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
We dont need to export the SCM specific cold boot flags to the platform
code. Export only a function to set the cold boot address.
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Architectural changes in the ARM Linux kernel tree mandate the eventual
removal of the mach-* directories. Move the scm driver to
drivers/firmware and the scm header to include/linux to support that
removal.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
