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c4e3e99ec4
If deep prefetch is enabled, but not all page table entries in the prefetch window are valid, improper permissions may be cached for valid entries in this window. Ensure the start and end of all mapped buffers are aligned to 16kB to prevent this issue. Change-Id: I53bc18529b77c775338c477487333b404b225c58 Signed-off-by: Patrick Daly <pdaly@codeaurora.org> [sudaraja@codeaurora.org: fixed merge conflicts] Signed-off-by: Sudarshan Rajagopalan <sudaraja@codeaurora.org>
33 lines
896 B
C
33 lines
896 B
C
/*
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* Copyright (c) 2017, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __ARM_SMMU_ERRATA_H__
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#define __ARM_SMMU_ERRATA_H__
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#define ARM_SMMU_MIN_IOVA_ALIGN SZ_16K
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#define ARM_SMMU_GUARD_PROT (IOMMU_READ | IOMMU_WRITE | IOMMU_GUARD)
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#ifdef CONFIG_ARM_SMMU
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struct page *arm_smmu_errata_get_guard_page(int vmid);
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#else
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static inline struct page *arm_smmu_errata_get_guard_page(
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int vmid)
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{
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return NULL;
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}
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#endif
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#endif
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