Jesse Brandeburg 2ce9047f5d e1000: add mmiowb() for IA64 to sync tail writes ...

IA64 SMP systems were seeing TX issues with multiple cpu's attempting
to write tail registers unordered. This mmiowb() fixes the issue.

Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>

2006-12-02 00:11:59 -05:00

..

e1000_ethtool.c

e1000: FIX: enable hw TSO for IPV6

2006-12-02 00:11:58 -05:00

e1000_hw.c

e1000: whitespace changes, comments, typos

2006-12-02 00:11:58 -05:00

e1000_hw.h

e1000: whitespace changes, comments, typos

2006-12-02 00:11:58 -05:00

e1000_main.c

e1000: add mmiowb() for IA64 to sync tail writes

2006-12-02 00:11:59 -05:00

e1000_osdep.h

e1000: whitespace changes, comments, typos

2006-12-02 00:11:58 -05:00

e1000_param.c

e1000: rename flow control symbols

2006-09-27 12:53:28 -07:00

e1000.h

e1000: FIX: enable hw TSO for IPV6

2006-12-02 00:11:58 -05:00

Makefile

e100, e1000, ixgb: update copyright header and remove LICENSE

2006-09-27 12:53:14 -07:00