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9fe60c2f32
SBalance's statistic of new interrupts for each CPU is inherently flawed in that it cannot track IRQ migration that occurs in between balance periods. As a result, SBalance can observe a flawed number of new interrupts for a CPU, which hurts its balancing decisions. Furthermore, SBalance incorrectly assumes that IRQs are affined where SBalance last placed them, which breaks SBalance entirely when the assumption doesn't hold true. As it turns out, it can be quite common to change an IRQ's affinity and observe a successful return value despite the IRQ not actually moving. At the very least this is observed on ARM's GICv3, and results in SBalance never moving such an IRQ ever again because SBalance always thinks it has zero new interrupts. Since we can't trust irqchip drivers or hardware, gather IRQ statistics directly in order to get the true number of new interrupts for each CPU and the actual affinity of each IRQ based on the last CPU it fired upon. Change-Id: Ic846adac244a0873c4502987e0904b552ab31f22 Signed-off-by: Sultan Alsawaf <sultan@kerneltoast.com> Signed-off-by: Richard Raya <rdxzv.dev@gmail.com>