Ralf Baechle 39a51109dd [MIPS] Extend performance counter event field.
The latest draft version of the MIPS Architecture Specification extends the
6 bit event field by adding a directly adjacent 4-bit EventExt field for a
total of 10 bits.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:59 +00:00
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