mirror of
https://github.com/rd-stuffs/msm-4.14.git
synced 2025-02-20 11:45:48 +08:00
This is a rather large set of patches for device drivers that for one reason or another the subsystem maintainer preferred to get merged through the arm-soc tree. There are both new drivers as well as existing drivers that are getting converted from platform-specific code into standalone drivers using the appropriate subsystem specific interfaces. In particular, we can now have pinctrl, clk, clksource and irqchip drivers in one file per driver, without the need to call into platform specific interface, or to get called from platform specific code, as long as all information about the hardware is provided through a device tree. Most of the drivers we touch this time are for clocksource. Since now most of them are part of drivers/clocksource, I expect that we won't have to touch these again from arm-soc and can let the clocksource maintainers take care of these in the future. Another larger part of this series is specific to the exynos platform, which is seeing some significant effort in upstreaming and modernization of its device drivers this time around, which unfortunately is also the cause for the churn and a lot of the merge conflicts. There is one new subsystem that gets merged as part of this series: the reset controller interface, which is a very simple interface for taking devices on the SoC out of reset or back into reset. Patches to use this interface on i.MX follow later in this merge window, and we are going to have other platforms (at least tegra and sirf) get converted in 3.11. This will let us get rid of platform specific callbacks in a number of platform independent device drivers. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJRhKUsAAoJEIwa5zzehBx3Ug4P/RqEen15hxS/NY8SIVRAU5c0 G9ZiSPcLmvXGR/t1RZFeLWKaKOYRb2oW1EbXrlkddprkmg85RuQE/KMpCgzPPhVC Yrs8UaagMGblaLOjwavVjin/CUXZokRdMfsQoIyMGOezmVGFnv4d4Kt64IOf35DF 24vDv/QO0BAI9k6m6WLqlWvSshb0IkW8r2LneRLnMEAVop7b1xkOxz0sR6l0LWfV 6JAMXyTjJMg0t8uCVW/QyNdxcxINHhV4SYcNkzF3EZ7ol50OiJsT9fg0XW759+Wb vlX6Xuehg+CBOg+g3ZOZuR8JOEkOhAGRSzuJkk/TmLCCxc+ghnuYz8HArxh6GMHK KaxvogLIi0ZsD94A/BZIKkDtOLWlzdz2HBrYo9PTz8zrOz/gXhwQ3zq0jPccC5E0 S+YYiobCBXepknF9301ti7wGD9VDzI8nmqOKG6tEBrD3xuO+RoBv+z4pBugN4/1C DlB19gOz60G5kniziL+wlmWER2qXmYrQZqS+s6+B2XoyoETC0Yij3Rck5vyC6qIK A2sni+Y9rzNOB9nzmnISP/UiGUffCy8AV4DZJjMSl0XkF4cpOXqRVGZ2nGB4tR5q GTOETcDCo5dvMDKX7Wfrz40CQzO39tnPCddg3OIS93ZwMpCeykIlb1FVL7RcsyF7 3uikzYHlDo3C5pvtJ5TS =ZWk9 -----END PGP SIGNATURE----- Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver changes from Olof Johansson: "This is a rather large set of patches for device drivers that for one reason or another the subsystem maintainer preferred to get merged through the arm-soc tree. There are both new drivers as well as existing drivers that are getting converted from platform-specific code into standalone drivers using the appropriate subsystem specific interfaces. In particular, we can now have pinctrl, clk, clksource and irqchip drivers in one file per driver, without the need to call into platform specific interface, or to get called from platform specific code, as long as all information about the hardware is provided through a device tree. Most of the drivers we touch this time are for clocksource. Since now most of them are part of drivers/clocksource, I expect that we won't have to touch these again from arm-soc and can let the clocksource maintainers take care of these in the future. Another larger part of this series is specific to the exynos platform, which is seeing some significant effort in upstreaming and modernization of its device drivers this time around, which unfortunately is also the cause for the churn and a lot of the merge conflicts. There is one new subsystem that gets merged as part of this series: the reset controller interface, which is a very simple interface for taking devices on the SoC out of reset or back into reset. Patches to use this interface on i.MX follow later in this merge window, and we are going to have other platforms (at least tegra and sirf) get converted in 3.11. This will let us get rid of platform specific callbacks in a number of platform independent device drivers." * tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (256 commits) irqchip: s3c24xx: add missing __init annotations ARM: dts: Disable the RTC by default on exynos5 clk: exynos5250: Fix parent clock for sclk_mmc{0,1,2,3} ARM: exynos: restore mach/regs-clock.h for exynos5 clocksource: exynos_mct: fix build error on non-DT pinctrl: vt8500: wmt: Fix checking return value of pinctrl_register() irqchip: vt8500: Convert arch-vt8500 to new irqchip infrastructure reset: NULL deref on allocation failure reset: Add reset controller API dt: describe base reset signal binding ARM: EXYNOS: Add arm-pmu DT binding for exynos421x ARM: EXYNOS: Add arm-pmu DT binding for exynos5250 ARM: EXYNOS: Enable PMUs for exynos4 irqchip: exynos-combiner: Correct combined IRQs for exynos4 irqchip: exynos-combiner: Add set_irq_affinity function for combiner_irq ARM: EXYNOS: fix compilation error introduced due to common clock migration clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3} clk: exynos4: export clocks required for fimc-is clk: samsung: Fix compilation error clk: tegra: fix enum tegra114_clk to match binding ...
642 lines
19 KiB
C
642 lines
19 KiB
C
/*
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* board-devkit8000.c - TimLL Devkit8000
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*
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* Copyright (C) 2009 Kim Botherway
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* Copyright (C) 2010 Thomas Weber
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*
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* Modified from mach-omap2/board-omap3beagle.c
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*
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* Initial code: Syed Mohammed Khasim
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/leds.h>
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#include <linux/gpio.h>
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#include <linux/input.h>
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#include <linux/gpio_keys.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/nand.h>
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#include <linux/mmc/host.h>
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#include <linux/usb/phy.h>
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#include <linux/regulator/machine.h>
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#include <linux/i2c/twl.h>
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#include "id.h"
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/flash.h>
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#include "common.h"
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#include "gpmc.h"
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#include <linux/platform_data/mtd-nand-omap2.h>
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#include <video/omapdss.h>
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#include <video/omap-panel-data.h>
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#include <linux/platform_data/spi-omap2-mcspi.h>
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#include <linux/input/matrix_keypad.h>
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#include <linux/spi/spi.h>
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#include <linux/dm9000.h>
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#include <linux/interrupt.h>
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#include "sdram-micron-mt46h32m32lf-6.h"
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#include "mux.h"
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#include "hsmmc.h"
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#include "board-flash.h"
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#include "common-board-devices.h"
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#define NAND_CS 0
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#define OMAP_DM9000_GPIO_IRQ 25
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#define OMAP3_DEVKIT_TS_GPIO 27
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static struct mtd_partition devkit8000_nand_partitions[] = {
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/* All the partition sizes are listed in terms of NAND block size */
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{
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.name = "X-Loader",
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.offset = 0,
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.size = 4 * NAND_BLOCK_SIZE,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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{
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.name = "U-Boot",
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.offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
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.size = 15 * NAND_BLOCK_SIZE,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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{
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.name = "U-Boot Env",
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.offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
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.size = 1 * NAND_BLOCK_SIZE,
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},
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{
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.name = "Kernel",
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.offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
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.size = 32 * NAND_BLOCK_SIZE,
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},
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{
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.name = "File System",
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.offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct omap2_hsmmc_info mmc[] = {
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{
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.mmc = 1,
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.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
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.gpio_wp = 29,
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.deferred = true,
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},
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{} /* Terminator */
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};
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static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
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{
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if (gpio_is_valid(dssdev->reset_gpio))
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gpio_set_value_cansleep(dssdev->reset_gpio, 1);
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return 0;
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}
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static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev)
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{
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if (gpio_is_valid(dssdev->reset_gpio))
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gpio_set_value_cansleep(dssdev->reset_gpio, 0);
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}
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static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = {
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REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
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};
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/* ads7846 on SPI */
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static struct regulator_consumer_supply devkit8000_vio_supply[] = {
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REGULATOR_SUPPLY("vcc", "spi2.0"),
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};
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static struct panel_generic_dpi_data lcd_panel = {
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.name = "innolux_at070tn83",
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.platform_enable = devkit8000_panel_enable_lcd,
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.platform_disable = devkit8000_panel_disable_lcd,
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};
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static struct omap_dss_device devkit8000_lcd_device = {
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.name = "lcd",
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.type = OMAP_DISPLAY_TYPE_DPI,
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.driver_name = "generic_dpi_panel",
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.data = &lcd_panel,
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.phy.dpi.data_lines = 24,
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};
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static struct tfp410_platform_data dvi_panel = {
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.power_down_gpio = -1,
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.i2c_bus_num = 1,
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};
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static struct omap_dss_device devkit8000_dvi_device = {
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.name = "dvi",
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.type = OMAP_DISPLAY_TYPE_DPI,
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.driver_name = "tfp410",
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.data = &dvi_panel,
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.phy.dpi.data_lines = 24,
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};
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static struct omap_dss_device devkit8000_tv_device = {
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.name = "tv",
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.driver_name = "venc",
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.type = OMAP_DISPLAY_TYPE_VENC,
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.phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
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};
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static struct omap_dss_device *devkit8000_dss_devices[] = {
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&devkit8000_lcd_device,
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&devkit8000_dvi_device,
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&devkit8000_tv_device,
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};
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static struct omap_dss_board_info devkit8000_dss_data = {
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.num_devices = ARRAY_SIZE(devkit8000_dss_devices),
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.devices = devkit8000_dss_devices,
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.default_device = &devkit8000_lcd_device,
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};
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static uint32_t board_keymap[] = {
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KEY(0, 0, KEY_1),
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KEY(1, 0, KEY_2),
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KEY(2, 0, KEY_3),
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KEY(0, 1, KEY_4),
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KEY(1, 1, KEY_5),
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KEY(2, 1, KEY_6),
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KEY(3, 1, KEY_F5),
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KEY(0, 2, KEY_7),
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KEY(1, 2, KEY_8),
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KEY(2, 2, KEY_9),
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KEY(3, 2, KEY_F6),
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KEY(0, 3, KEY_F7),
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KEY(1, 3, KEY_0),
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KEY(2, 3, KEY_F8),
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PERSISTENT_KEY(4, 5),
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KEY(4, 4, KEY_VOLUMEUP),
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KEY(5, 5, KEY_VOLUMEDOWN),
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0
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};
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static struct matrix_keymap_data board_map_data = {
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.keymap = board_keymap,
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.keymap_size = ARRAY_SIZE(board_keymap),
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};
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static struct twl4030_keypad_data devkit8000_kp_data = {
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.keymap_data = &board_map_data,
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.rows = 6,
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.cols = 6,
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.rep = 1,
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};
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static struct gpio_led gpio_leds[];
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static int devkit8000_twl_gpio_setup(struct device *dev,
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unsigned gpio, unsigned ngpio)
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{
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int ret;
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/* gpio + 0 is "mmc0_cd" (input/IRQ) */
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mmc[0].gpio_cd = gpio + 0;
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omap_hsmmc_late_init(mmc);
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/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
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gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
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/* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
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devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0;
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ret = gpio_request_one(devkit8000_lcd_device.reset_gpio,
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GPIOF_OUT_INIT_LOW, "LCD_PWREN");
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if (ret < 0) {
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devkit8000_lcd_device.reset_gpio = -EINVAL;
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printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n");
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}
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/* gpio + 7 is "DVI_PD" (out, active low) */
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dvi_panel.power_down_gpio = gpio + 7;
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return 0;
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}
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static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
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.use_leds = true,
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.pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
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| BIT(15) | BIT(16) | BIT(17),
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.setup = devkit8000_twl_gpio_setup,
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};
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static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = {
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REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
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REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
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};
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/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
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static struct regulator_init_data devkit8000_vmmc1 = {
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.constraints = {
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.min_uV = 1850000,
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.max_uV = 3150000,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
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| REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply),
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.consumer_supplies = devkit8000_vmmc1_supply,
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};
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/* VPLL1 for digital video outputs */
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static struct regulator_init_data devkit8000_vpll1 = {
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.constraints = {
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.min_uV = 1800000,
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.max_uV = 1800000,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies),
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.consumer_supplies = devkit8000_vpll1_supplies,
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};
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/* VAUX4 for ads7846 and nubs */
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static struct regulator_init_data devkit8000_vio = {
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.constraints = {
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.min_uV = 1800000,
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.max_uV = 1800000,
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.apply_uV = true,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply),
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.consumer_supplies = devkit8000_vio_supply,
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};
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static struct twl4030_platform_data devkit8000_twldata = {
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/* platform_data for children goes here */
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.gpio = &devkit8000_gpio_data,
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.vmmc1 = &devkit8000_vmmc1,
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.vpll1 = &devkit8000_vpll1,
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.vio = &devkit8000_vio,
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.keypad = &devkit8000_kp_data,
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};
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static int __init devkit8000_i2c_init(void)
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{
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omap3_pmic_get_config(&devkit8000_twldata,
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TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
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TWL_COMMON_REGULATOR_VDAC);
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omap3_pmic_init("tps65930", &devkit8000_twldata);
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/* Bus 3 is attached to the DVI port where devices like the pico DLP
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* projector don't work reliably with 400kHz */
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omap_register_i2c_bus(3, 400, NULL, 0);
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return 0;
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}
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static struct gpio_led gpio_leds[] = {
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{
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.name = "led1",
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.default_trigger = "heartbeat",
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.gpio = 186,
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.active_low = true,
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},
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{
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.name = "led2",
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.default_trigger = "mmc0",
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.gpio = 163,
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.active_low = true,
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},
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{
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.name = "ledB",
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.default_trigger = "none",
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.gpio = 153,
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.active_low = true,
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},
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{
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.name = "led3",
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.default_trigger = "none",
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.gpio = 164,
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.active_low = true,
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},
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};
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static struct gpio_led_platform_data gpio_led_info = {
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.leds = gpio_leds,
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.num_leds = ARRAY_SIZE(gpio_leds),
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};
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static struct platform_device leds_gpio = {
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.name = "leds-gpio",
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.id = -1,
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.dev = {
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.platform_data = &gpio_led_info,
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},
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};
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static struct gpio_keys_button gpio_buttons[] = {
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{
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.code = BTN_EXTRA,
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.gpio = 26,
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.desc = "user",
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.wakeup = 1,
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},
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};
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static struct gpio_keys_platform_data gpio_key_info = {
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.buttons = gpio_buttons,
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.nbuttons = ARRAY_SIZE(gpio_buttons),
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};
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static struct platform_device keys_gpio = {
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.name = "gpio-keys",
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.id = -1,
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.dev = {
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.platform_data = &gpio_key_info,
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},
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};
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#define OMAP_DM9000_BASE 0x2c000000
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static struct resource omap_dm9000_resources[] = {
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[0] = {
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.start = OMAP_DM9000_BASE,
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.end = (OMAP_DM9000_BASE + 0x4 - 1),
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = (OMAP_DM9000_BASE + 0x400),
|
|
.end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1),
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[2] = {
|
|
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
|
|
},
|
|
};
|
|
|
|
static struct dm9000_plat_data omap_dm9000_platdata = {
|
|
.flags = DM9000_PLATF_16BITONLY,
|
|
};
|
|
|
|
static struct platform_device omap_dm9000_dev = {
|
|
.name = "dm9000",
|
|
.id = -1,
|
|
.num_resources = ARRAY_SIZE(omap_dm9000_resources),
|
|
.resource = omap_dm9000_resources,
|
|
.dev = {
|
|
.platform_data = &omap_dm9000_platdata,
|
|
},
|
|
};
|
|
|
|
static void __init omap_dm9000_init(void)
|
|
{
|
|
unsigned char *eth_addr = omap_dm9000_platdata.dev_addr;
|
|
struct omap_die_id odi;
|
|
int ret;
|
|
|
|
ret = gpio_request_one(OMAP_DM9000_GPIO_IRQ, GPIOF_IN, "dm9000 irq");
|
|
if (ret < 0) {
|
|
printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n",
|
|
OMAP_DM9000_GPIO_IRQ);
|
|
return;
|
|
}
|
|
|
|
/* init the mac address using DIE id */
|
|
omap_get_die_id(&odi);
|
|
|
|
eth_addr[0] = 0x02; /* locally administered */
|
|
eth_addr[1] = odi.id_1 & 0xff;
|
|
eth_addr[2] = (odi.id_0 & 0xff000000) >> 24;
|
|
eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16;
|
|
eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8;
|
|
eth_addr[5] = (odi.id_0 & 0x000000ff);
|
|
}
|
|
|
|
static struct platform_device *devkit8000_devices[] __initdata = {
|
|
&leds_gpio,
|
|
&keys_gpio,
|
|
&omap_dm9000_dev,
|
|
};
|
|
|
|
static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
|
|
.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
|
|
};
|
|
|
|
#ifdef CONFIG_OMAP_MUX
|
|
static struct omap_board_mux board_mux[] __initdata = {
|
|
/* nCS and IRQ for Devkit8000 ethernet */
|
|
OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0),
|
|
OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
|
|
|
|
/* McSPI 2*/
|
|
OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
|
|
/* PENDOWN GPIO */
|
|
OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
|
|
|
|
/* mUSB */
|
|
OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
|
|
/* USB 1 */
|
|
OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
|
|
|
|
/* MMC 1 */
|
|
OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
|
|
/* McBSP 2 */
|
|
OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
|
|
/* I2C 1 */
|
|
OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
|
|
/* I2C 2 */
|
|
OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
|
|
/* I2C 3 */
|
|
OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
|
|
/* I2C 4 */
|
|
OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
|
|
/* serial ports */
|
|
OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
|
|
/* DSS */
|
|
OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
|
|
/* expansion port */
|
|
/* McSPI 1 */
|
|
OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
|
|
OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
|
|
|
|
/* HDQ */
|
|
OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
|
|
/* McSPI4 */
|
|
OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
|
|
|
|
/* MMC 2 */
|
|
OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
|
|
|
|
/* I2C3 */
|
|
OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
|
|
OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
|
|
|
|
OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
|
|
|
|
/* TPS IRQ */
|
|
OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
|
|
OMAP_PIN_INPUT_PULLUP),
|
|
|
|
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
|
};
|
|
#endif
|
|
|
|
static void __init devkit8000_init(void)
|
|
{
|
|
omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
|
|
omap_serial_init();
|
|
omap_sdrc_init(mt46h32m32lf6_sdrc_params,
|
|
mt46h32m32lf6_sdrc_params);
|
|
|
|
omap_dm9000_init();
|
|
|
|
omap_hsmmc_init(mmc);
|
|
devkit8000_i2c_init();
|
|
omap_dm9000_resources[2].start = gpio_to_irq(OMAP_DM9000_GPIO_IRQ);
|
|
platform_add_devices(devkit8000_devices,
|
|
ARRAY_SIZE(devkit8000_devices));
|
|
|
|
omap_display_init(&devkit8000_dss_data);
|
|
|
|
omap_ads7846_init(2, OMAP3_DEVKIT_TS_GPIO, 0, NULL);
|
|
|
|
usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
|
|
usb_musb_init(NULL);
|
|
usbhs_init(&usbhs_bdata);
|
|
board_nand_init(devkit8000_nand_partitions,
|
|
ARRAY_SIZE(devkit8000_nand_partitions), NAND_CS,
|
|
NAND_BUSWIDTH_16, NULL);
|
|
omap_twl4030_audio_init("omap3beagle", NULL);
|
|
|
|
/* Ensure SDRC pins are mux'd for self-refresh */
|
|
omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
|
|
omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
|
|
}
|
|
|
|
MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
|
|
.atag_offset = 0x100,
|
|
.reserve = omap_reserve,
|
|
.map_io = omap3_map_io,
|
|
.init_early = omap35xx_init_early,
|
|
.init_irq = omap3_init_irq,
|
|
.handle_irq = omap3_intc_handle_irq,
|
|
.init_machine = devkit8000_init,
|
|
.init_late = omap35xx_init_late,
|
|
.init_time = omap3_secure_sync32k_timer_init,
|
|
.restart = omap3xxx_restart,
|
|
MACHINE_END
|