Ralf Baechle 7b0fdaa6a1 [MIPS] Provide empty irq_enable_hazard definition for legacy and R1 cores.
Following a strict interpretation the empty definition of irq_enable_hazard
has always been a bug - but an intentional one because it didn't bite.
This has now changed, for uniprocessor kernels mm/slab.c:do_drain()

[...]
        on_each_cpu(do_drain, cachep, 1, 1);
        check_irq_on();
[...]

may be compiled into a mtc0 c0_status; mfc0 c0_status sequence resulting
in a back-to-back hazard.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-09-10 21:25:28 +01:00
..
2007-08-25 01:44:01 -04:00
2007-08-09 08:39:22 -07:00
2007-08-15 16:36:56 +02:00
2007-08-11 15:47:40 -07:00
2007-08-31 01:42:22 -07:00
2007-08-18 17:15:17 -07:00
2007-07-31 15:39:41 -07:00
2007-07-26 11:35:16 -07:00