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7dd6662a92
This implements EXPMASK initialization code for SH-4A parts, where it is possible to disable compat features that will go away in newer cores. Presently this includes disabling support for non-nop instructions in the rte delay slot, as well as a sleep instruction being placed in a delay slot (neither of which the kernel does any longer). As a result of this, any future offenders will have illegal slot exceptions generated for them. Associative writes for the memory-mapped cache array are still left enabled, until such a point that special cache operations for SH-4A are provided to move off of the current (and rather dated) SH-4 versions. Signed-off-by: Paul Mundt <lethal@linux-sh.org>