malhuda/msm-4.14
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msm-4.14/arch/sh/kernel/cpu
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Paul Mundt 38350e0a00 sh: Get SH-5 caches working again post-unification. 
A number of cleanups to get the SH-5 cache management code in line with
the rest of the SH backend.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-14 14:22:12 +09:00
..
irq
sh: Shut up some trivial build warnings.
2008-02-14 14:22:11 +09:00
sh2
sh: intc - remove default interrupt priority tables
2008-01-28 13:19:02 +09:00
sh2a
sh: intc - remove default interrupt priority tables
2008-01-28 13:19:02 +09:00
sh3
sh: Add OHCI and UDC platform devices for SH7720.
2008-01-28 13:19:03 +09:00
sh4
sh: add support for sh7366 processor
2008-02-14 14:22:10 +09:00
sh4a
sh: add support for sh7366 processor
2008-02-14 14:22:10 +09:00
sh5
sh: Get SH-5 caches working again post-unification.
2008-02-14 14:22:12 +09:00
adc.c
Linux-2.6.12-rc2
2005-04-16 15:20:36 -07:00
clock.c
sh: clkfwk: Support multi-level clock propagation.
2007-09-28 11:51:52 +09:00
init.c
sh: Encode L1/L2 cache shape in auxvt.
2008-01-28 13:18:59 +09:00
Makefile
sh: Move over the SH-5 entry.S.
2008-01-28 13:18:46 +09:00
ubc.S
fix file specification in comments
2006-10-03 23:01:26 +02:00