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d887a1ce28
PLL_LOCKCNT applies only to the PLL programming sequence which does not apply to core and system clock dividers. Writes to PLL_DIV to change the CSEL/SSEL dividers take effect immediately. There is still overhead in software in writing the new dividers, so just use a value of 50us as this should be good enough. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>