Rajendra Nayak ecbb065947 OMAP4: clocks: Fix the clksel_rate struct DPLL divs
For all DPLL's the valid dividers are same as the values
to be programmed in the register. 0 is an invalid value.
The changes are generated by updating the script which autogenerates
the file modifed in the patch.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-01-20 13:35:28 -07:00
..
2009-12-16 07:20:12 -08:00
2009-12-11 06:44:29 -05:00
2010-01-12 18:19:38 +01:00
2010-01-04 09:05:58 +01:00
2010-01-04 15:38:50 +09:00