Ruchika Kharwar 81fbf101f2 usb: phy: omap-usb3: updated dpll M,N values to support DRA7xx devices
Addition of the M and N recommended values for the USB3 PHY DPLL.
Sysclk for DRA7xx is 20MHz.

This yields:
Clk = 20MHz * M/(N+1) = 20MHz * 1000 /(7+1) = 2.5 Ghz

Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-06-01 00:22:49 +03:00
..
2013-04-25 10:58:00 -07:00