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staging:iio:adc:ad7152: increase readability by introducing proper bit defines
Some other miscellaneous cleanup. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -1,7 +1,7 @@
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/*
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* AD7152 capacitive sensor driver supporting AD7152/3
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*
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* Copyright 2010 Analog Devices Inc.
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* Copyright 2010-2011a Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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@ -25,24 +25,55 @@
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* AD7152 registers definition
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*/
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#define AD7152_STATUS 0
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#define AD7152_STATUS_RDY1 (1 << 0)
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#define AD7152_STATUS_RDY2 (1 << 1)
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#define AD7152_CH1_DATA_HIGH 1
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#define AD7152_CH2_DATA_HIGH 3
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#define AD7152_CH1_OFFS_HIGH 5
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#define AD7152_CH2_OFFS_HIGH 7
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#define AD7152_CH1_GAIN_HIGH 9
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#define AD7152_CH1_SETUP 11
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#define AD7152_CH2_GAIN_HIGH 12
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#define AD7152_CH2_SETUP 14
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#define AD7152_CFG 15
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#define AD7152_RESEVERD 16
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#define AD7152_CAPDAC_POS 17
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#define AD7152_CAPDAC_NEG 18
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#define AD7152_CFG2 26
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#define AD7152_REG_STATUS 0
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#define AD7152_REG_CH1_DATA_HIGH 1
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#define AD7152_REG_CH2_DATA_HIGH 3
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#define AD7152_REG_CH1_OFFS_HIGH 5
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#define AD7152_REG_CH2_OFFS_HIGH 7
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#define AD7152_REG_CH1_GAIN_HIGH 9
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#define AD7152_REG_CH1_SETUP 11
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#define AD7152_REG_CH2_GAIN_HIGH 12
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#define AD7152_REG_CH2_SETUP 14
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#define AD7152_REG_CFG 15
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#define AD7152_REG_RESEVERD 16
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#define AD7152_REG_CAPDAC_POS 17
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#define AD7152_REG_CAPDAC_NEG 18
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#define AD7152_REG_CFG2 26
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#define AD7152_MAX_CONV_MODE 6
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/* Status Register Bit Designations (AD7152_REG_STATUS) */
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#define AD7152_STATUS_RDY1 (1 << 0)
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#define AD7152_STATUS_RDY2 (1 << 1)
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#define AD7152_STATUS_C1C2 (1 << 2)
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#define AD7152_STATUS_PWDN (1 << 7)
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/* Setup Register Bit Designations (AD7152_REG_CHx_SETUP) */
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#define AD7152_SETUP_CAPDIFF (1 << 5)
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#define AD7152_SETUP_RANGE_2pF (0 << 6)
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#define AD7152_SETUP_RANGE_0_5pF (1 << 6)
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#define AD7152_SETUP_RANGE_1pF (2 << 6)
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#define AD7152_SETUP_RANGE_4pF (3 << 6)
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/* Config Register Bit Designations (AD7152_REG_CFG) */
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#define AD7152_CONF_CH2EN (1 << 3)
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#define AD7152_CONF_CH1EN (1 << 4)
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#define AD7152_CONF_MODE_IDLE (0 << 0)
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#define AD7152_CONF_MODE_CONT_CONV (1 << 0)
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#define AD7152_CONF_MODE_SINGLE_CONV (2 << 0)
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#define AD7152_CONF_MODE_OFFS_CAL (5 << 0)
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#define AD7152_CONF_MODE_GAIN_CAL (6 << 0)
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/* Capdac Register Bit Designations (AD7152_REG_CAPDAC_XXX) */
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#define AD7152_CAPDAC_DACEN (1 << 7)
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#define AD7152_CAPDAC_DACP(x) ((x) & 0x1F)
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#define AD7152_MAX_CONV_MODE 6
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enum {
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AD7152_DATA,
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AD7152_OFFS,
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AD7152_GAIN,
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AD7152_SETUP
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};
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/*
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* struct ad7152_chip_info - chip specifc information
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@ -77,11 +108,11 @@ static inline ssize_t ad7152_start_calib(struct device *dev,
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return 0;
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if (this_attr->address == 0)
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regval |= (1 << 4);
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regval |= AD7152_CONF_CH1EN;
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else
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regval |= (1 << 3);
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regval |= AD7152_CONF_CH2EN;
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ret = i2c_smbus_write_byte_data(chip->client, AD7152_CFG, regval);
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ret = i2c_smbus_write_byte_data(chip->client, AD7152_REG_CFG, regval);
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if (ret < 0)
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return ret;
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/* Unclear on period this should be set for or whether it flips back
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@ -94,14 +125,16 @@ static ssize_t ad7152_start_offset_calib(struct device *dev,
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size_t len)
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{
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return ad7152_start_calib(dev, attr, buf, len, 5);
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return ad7152_start_calib(dev, attr, buf, len,
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AD7152_CONF_MODE_OFFS_CAL);
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}
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static ssize_t ad7152_start_gain_calib(struct device *dev,
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struct device_attribute *attr,
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const char *buf,
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size_t len)
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{
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return ad7152_start_calib(dev, attr, buf, len, 6);
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return ad7152_start_calib(dev, attr, buf, len,
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AD7152_CONF_MODE_GAIN_CAL);
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}
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static IIO_DEVICE_ATTR(in_capacitance0_calibbias_calibration,
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@ -140,7 +173,7 @@ static ssize_t ad7152_store_filter_rate_setup(struct device *dev,
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if (ret < 0)
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return ret;
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ret = i2c_smbus_write_byte_data(chip->client, AD7152_CFG2, data);
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ret = i2c_smbus_write_byte_data(chip->client, AD7152_REG_CFG2, data);
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if (ret < 0)
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return ret;
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@ -167,10 +200,10 @@ static const struct attribute_group ad7152_attribute_group = {
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};
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static const u8 ad7152_addresses[][4] = {
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{ AD7152_CH1_DATA_HIGH, AD7152_CH1_OFFS_HIGH,
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AD7152_CH1_GAIN_HIGH, AD7152_CH1_SETUP },
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{ AD7152_CH2_DATA_HIGH, AD7152_CH2_OFFS_HIGH,
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AD7152_CH2_GAIN_HIGH, AD7152_CH2_SETUP },
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{ AD7152_REG_CH1_DATA_HIGH, AD7152_REG_CH1_OFFS_HIGH,
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AD7152_REG_CH1_GAIN_HIGH, AD7152_REG_CH1_SETUP },
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{ AD7152_REG_CH2_DATA_HIGH, AD7152_REG_CH2_OFFS_HIGH,
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AD7152_REG_CH2_GAIN_HIGH, AD7152_REG_CH2_SETUP },
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};
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/* Values are micro relative to pf base. */
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@ -192,8 +225,8 @@ static int ad7152_write_raw(struct iio_dev *dev_info,
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if ((val < 0) | (val > 0xFFFF))
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return -EINVAL;
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ret = i2c_smbus_write_word_data(chip->client,
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ad7152_addresses[chan->channel][2],
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val);
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ad7152_addresses[chan->channel][AD7152_GAIN],
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val);
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if (ret < 0)
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return ret;
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@ -203,8 +236,8 @@ static int ad7152_write_raw(struct iio_dev *dev_info,
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if ((val < 0) | (val > 0xFFFF))
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return -EINVAL;
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ret = i2c_smbus_write_word_data(chip->client,
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ad7152_addresses[chan->channel][1],
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val);
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ad7152_addresses[chan->channel][AD7152_OFFS],
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val);
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if (ret < 0)
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return ret;
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@ -216,13 +249,13 @@ static int ad7152_write_raw(struct iio_dev *dev_info,
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if (val2 <= ad7152_scale_table[i])
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break;
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ret = i2c_smbus_read_byte_data(chip->client,
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ad7152_addresses[chan->channel][3]);
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ad7152_addresses[chan->channel][AD7152_SETUP]);
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if (ret < 0)
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return ret;
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if ((ret & 0xC0) != i)
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ret = i2c_smbus_write_byte_data(chip->client,
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ad7152_addresses[chan->channel][3],
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(ret & ~0xC0) | i);
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ad7152_addresses[chan->channel][AD7152_SETUP],
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(ret & ~0xC0) | i);
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if (ret < 0)
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return ret;
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else
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@ -243,25 +276,25 @@ static int ad7152_read_raw(struct iio_dev *dev_info,
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case 0:
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/* First set whether in differential mode */
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if (chan->differential)
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regval = (1 << 5);
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regval = AD7152_SETUP_CAPDIFF;
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/* Make sure the channel is enabled */
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if (chan->channel == 0)
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regval |= (1 << 4);
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if (chan->address == 0)
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regval |= AD7152_CONF_CH1EN;
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else
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regval |= (1 << 3);
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regval |= AD7152_CONF_CH2EN;
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/* Trigger a single read */
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regval |= 0x02;
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regval |= AD7152_CONF_MODE_SINGLE_CONV;
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ret = i2c_smbus_write_byte_data(chip->client,
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ad7152_addresses[chan->channel][3],
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regval);
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ad7152_addresses[chan->channel][AD7152_SETUP],
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regval);
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if (ret < 0)
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return ret;
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msleep(60); /* Slowest conversion time */
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/* Now read the actual register */
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ret = i2c_smbus_read_word_data(chip->client,
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ad7152_addresses[chan->channel][0]);
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ad7152_addresses[chan->channel][AD7152_DATA]);
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if (ret < 0)
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return ret;
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*val = ret;
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@ -270,7 +303,7 @@ static int ad7152_read_raw(struct iio_dev *dev_info,
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case (1 << IIO_CHAN_INFO_CALIBSCALE_SEPARATE):
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/* FIXME: Hmm. very small. it's 1+ 1/(2^16 *val) */
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ret = i2c_smbus_read_word_data(chip->client,
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ad7152_addresses[chan->channel][2]);
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ad7152_addresses[chan->channel][AD7152_GAIN]);
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if (ret < 0)
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return ret;
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*val = ret;
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@ -278,7 +311,7 @@ static int ad7152_read_raw(struct iio_dev *dev_info,
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return IIO_VAL_INT;
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case (1 << IIO_CHAN_INFO_CALIBBIAS_SEPARATE):
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ret = i2c_smbus_read_word_data(chip->client,
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ad7152_addresses[chan->channel][1]);
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ad7152_addresses[chan->channel][AD7152_OFFS]);
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if (ret < 0)
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return ret;
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*val = ret;
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@ -286,7 +319,7 @@ static int ad7152_read_raw(struct iio_dev *dev_info,
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return IIO_VAL_INT;
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case (1 << IIO_CHAN_INFO_SCALE_SEPARATE):
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ret = i2c_smbus_read_byte_data(chip->client,
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ad7152_addresses[chan->channel][3]);
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ad7152_addresses[chan->channel][AD7152_SETUP]);
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if (ret < 0)
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return ret;
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*val = 0;
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@ -361,7 +394,7 @@ static int __devinit ad7152_probe(struct i2c_client *client,
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chip->client = client;
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/* Echipabilish that the iio_dev is a child of the i2c device */
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/* Establish that the iio_dev is a child of the i2c device */
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indio_dev->name = id->name;
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indio_dev->dev.parent = &client->dev;
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indio_dev->info = &ad7152_info;
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@ -406,7 +439,7 @@ MODULE_DEVICE_TABLE(i2c, ad7152_id);
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static struct i2c_driver ad7152_driver = {
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.driver = {
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.name = "ad7152",
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.name = KBUILD_MODNAME,
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},
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.probe = ad7152_probe,
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.remove = __devexit_p(ad7152_remove),
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@ -424,7 +457,7 @@ static __exit void ad7152_exit(void)
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}
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MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
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MODULE_DESCRIPTION("Analog Devices ad7152/3 capacitive sensor driver");
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MODULE_DESCRIPTION("Analog Devices AD7152/3 capacitive sensor driver");
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MODULE_LICENSE("GPL v2");
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module_init(ad7152_init);
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