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clk: qcom: clk-alpha-pll: Avoid reconfiguring Trion and Regera PLLs

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Return early from the Trion and Regera PLL configure operations
if they've been configured already.

Change-Id: I6865571d5d54d548faa297360d65f49ca13a9f0f
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
This commit is contained in:
Deepak Katragadda 2018-05-30 16:51:01 -07:00
parent beb3e1828e
commit f6f113ff7b
1 changed files with 7 additions and 12 deletions
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19
drivers/clk/qcom/clk-alpha-pll.c
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@ -724,23 +724,15 @@ int clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
{
int ret = 0;
if (pll->inited)
return ret;
if (trion_pll_is_enabled(pll, regmap)) {
pr_warn("PLL is already enabled. Skipping configuration.\n");
pll->inited = true;
return ret;
}
/*
* Disable the PLL if it's already been initialized. Not doing so might
* lead to the PLL running with the old frequency configuration.
*/
if (pll->inited) {
ret = regmap_update_bits(regmap, pll->offset + PLL_MODE,
PLL_RESET_N, 0);
if (ret)
return ret;
}
if (config->l)
regmap_write(regmap, pll->offset + PLL_L_VAL,
config->l);
@ -1032,7 +1024,10 @@ int clk_regera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
const struct alpha_pll_config *config)
{
u32 mode_regval;
int ret;
int ret = 0;
if (pll->inited)
return ret;
ret = regmap_read(regmap, pll->offset + PLL_MODE, &mode_regval);
if (ret)