Body of an "if" statement wasn't indented. Add a tab.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The xilinx-nwl driver never uses the platform drvdata pointer, so don't
bother setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
xilinx_pcie_assign_msi() doesn't use the struct xilinx_pcie_port pointer
passed to it, so remove the argument completely. No functional change
intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The xilinx driver never uses the platform drvdata pointer, so don't
bother setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Pass the struct xgene_pcie_port pointer, not addresses, to setup functions.
This enables future simplifications. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The xgene driver never uses the platform drvdata pointer, so don't
bother setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The tegra driver never uses the platform drvdata pointer, so don't
bother setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The tegra_pcie_phy_disable() path called pads_writel() with arguments in
the wrong order. Swap them to be the "value, offset" order expected by
pads_writel().
Fixes: 6fe7c187e026 ("PCI: tegra: Support per-lane PHYs")
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Thierry Reding <treding@nvidia.com>
CC: stable@vger.kernel.org # v4.7+
The rockchip driver never uses the platform drvdata pointer, so don't
bother setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Shawn Lin <shawn.lin@rock-chips.com>
Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
The DRV_NAME macro is only used once, so there's no real advantage to
having the macro at all. Remove it and use the "rcar-pcie" name directly
in the struct platform_driver. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
rcar_pcie_get_resources() doesn't use the platform_device pointer passed to
it, so remove it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
The rcar driver never uses the platform drvdata pointer, so don't bother
setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Use the existing "np" pointer instead of looking up dev->of_node again. No
functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
We know where the PCIe capability lives in the host bridge's config space;
in fact, we already hard-coded the offset of the Link Control 2 register.
The hard-coded Link Control 2 offset was 0xdc. Link Control 2 is at offset
0x30 into the PCIe capability, so the capability itself must be at
0xdc - 0x30 = 0xac.
Hard-code the PCIe capability offset, which means we don't have to search
for it and we can use the standard definitions for registers within the
capability.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The callers never pass a null "pcie" pointer (they check for kzalloc
failure), so we don't need to check here. The bus driver should never call
the probe function with a null ->dev pointer, so we don't need to check
that either. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Validate iproc_pcie->base for BCMA devices just like we already do for
platform devices in iproc_pcie_pltfm_probe(). No functional change
intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Set the drvdata pointer at the end of probe function for consistency with
other drivers. We don't need the drvdata until after the probe completes,
and we don't need it at all if the probe fails. No functional change
intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
TLP_CFG_DW1() was only used with altera->root_bus_nr and RP_DEVFN, so
encode that directly into the macro so we don't have to clutter the uses
with the TLP_REQ_ID() usage. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
All TLP_CFG_DW0() uses follow the same pattern based on the root bus
number, so pull that into the macro itself to declutter the users. No
functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
devm_ioremap_resource() fails gracefully when given a NULL resource
pointer, so we don't need to check separately for failure from
platform_get_resource_byname(). Remove the redundant check.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The altera driver never uses the platform drvdata pointer, so don't bother
setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The aardvark driver never uses the platform drvdata pointer, so don't
bother setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
The designware-plat driver never uses the platform drvdata pointer, so
don't bother setting it. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Remove the struct dw_plat_pcie.mem_base member, which is only used as a
temporary. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Swap order of dw_pcie_readl_unroll() arguments to match the "dev, pos, val"
order used by pci_write_config_word() and other drivers. No functional
change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The register accessors are not performance critical and small enough that
the compiler can inline them itself if it makes sense.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Export dw_pcie_readl_rc() and dw_pcie_writel_rc(). Many other drivers can
use these instead of implementing their own versions. No functional change
intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Swap order of dw_pcie_writel_rc() arguments to match the "dev, pos, val"
order used by pci_write_config_word() and other drivers. No functional
change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The struct pcie_host_ops.readl_rc() and .writel_rc() function pointers
allow a driver to override the default DesignWare register accessors.
Make the signature of the override functions the same as the default
accessors. This makes the default dw_pcie_readl_rc() and the corresponding
override more structurally similar: both will compute the final register
address with "pp->dbi_base + reg". Previously dw_pcie_readl_rc() computed
the address and passed it to the override.
No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
dw_pcie_readl_unroll() and dw_pcie_writel_unroll() duplicate what
dw_pcie_readl_rc() and dw_pcie_writel_rc() already do, so call them
directly.
[bhelgaas: reworked into patch series]
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use a local "struct device *dev" for brevity and consistency with other
drivers. No functional change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Rename dw_pcie_valid_config() to dw_pcie_valid_device() and use the result
directly as a boolean value instead of testing against 0. No functional
change intended.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* pci/host-vmd:
x86/PCI: VMD: Move VMD driver to drivers/pci/host
x86/PCI: VMD: Synchronize with RCU freeing MSI IRQ descs
x86/PCI: VMD: Eliminate index member from IRQ list
x86/PCI: VMD: Eliminate vmd_vector member from list type
x86/PCI: VMD: Convert to use pci_alloc_irq_vectors() API
x86/PCI: VMD: Allocate IRQ lists with correct MSI-X count
PCI: Use positive flags in pci_alloc_irq_vectors()
PCI: Update "pci=resource_alignment" documentation
Conflicts:
drivers/pci/host/Kconfig
drivers/pci/host/Makefile
* pci/host-aardvark:
PCI: aardvark: Remove redundant dev_err call in advk_pcie_probe()
* pci/host-altera:
PCI: altera: Remove redundant platform_get_resource() return value check
PCI: altera: Move retrain from fixup to altera_pcie_host_init()
PCI: altera: Rework config accessors for use without a struct pci_bus
PCI: altera: Poll for link training status after retraining the link
* pci/host-artpec:
PCI: artpec6: Drop __init from artpec6_add_pcie_port()
* pci/host-designware:
PCI: designware: Remove redundant platform_get_resource() return value check
PCI: designware: Exchange viewport of `MEMORYs' and `CFGs/IOs'
PCI: designware: Keep viewport fixed for IO transaction if num_viewport > 2
PCI: designware: Check LTSSM training bit before deciding link is up
PCI: designware: Add iATU Unroll feature
PCI: designware: Wait for iATU enable
PCI: designware: Move link wait definitions to .c file
PCI: designware: Return data directly from dw_pcie_readl_rc()
* pci/host-hv:
PCI: hv: Handle hv_pci_generic_compl() error case
PCI: hv: Handle vmbus_sendpacket() failure in hv_compose_msi_msg()
PCI: hv: Remove the unused 'wrk' in struct hv_pcibus_device
PCI: hv: Use pci_function_description[0] in struct definitions
PCI: hv: Use zero-length array in struct pci_packet
PCI: hv: Use list_move_tail() instead of list_del() + list_add_tail()
* pci/host-keystone:
PCI: keystone: Propagate request_irq() failure
* pci/host-rcar:
PCI: rcar: Try increasing PCIe link speed to 5 GT/s at boot
PCI: rcar: Fix some checkpatch warnings
PCI: rcar: Add multi-MSI support
PCI: rcar: Don't disable/unprepare clocks on prepare/enable failure
PCI: rcar: Consolidate register space lookup and ioremap
* pci/host-rockchip:
PCI: rockchip: Fix wrong transmitted FTS count
PCI: rockchip: Improve the deassert sequence of four reset pins
PCI: rockchip: Increase the Max Credit update interval
PCI: rockchip: Add Rockchip PCIe controller support
dt-bindings: PCI: rockchip: Add DT bindings for Rockchip PCIe controller
* pci/host-tegra:
PCI: tegra: Use of_device_get_match_data()
PCI: tegra: Remove redundant _data suffix
* pci/host-xilinx:
microblaze/PCI: Add multidomain support for procfs
PCI: xilinx: Dispose of MSI virtual IRQ
PCI: xilinx: Clear correct MSI set bit
PCI: xilinx: Clear interrupt register for invalid interrupt
PCI: xilinx: Keep both legacy and MSI interrupt domain references
PCI: xilinx-nwl: Enable all MSI interrupts using MSI mask
PCI: xilinx-nwl: Expand error logging
Conflicts:
drivers/pci/host/pcie-xilinx.c
Move the driver source and Kconfig to the PCI host bridge drivers directory
and move the config option to a more appropriate sub-menu instead of
occupying the top-level location.
Update the Kconfig option with the X86_64 dependency that was implicitly
included from the previous location, and add information about the module
name when built as a loadable module.
Signed-off-by: Keith Busch <keith.busch@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Jon Derrick <jonathan.derrick@intel.com>
