Update direct connect info for GPIOs as per latest mappings.
Change-Id: I0c007028c859642755e0c33cba11f4647927051a
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Following upstream changes are reverted due cpu low
power mode use cases regressions.
'commit 55e591cc1879 ("BACKPORT: time: tick-sched: Reorganize idle tick management code")'
'commit f6d3093dfc66 ("BACKPORT: sched: idle: Do not stop the tick upfront in the idle loop")'
'commit 27e8616e4282 ("UPSTREAM: sched: idle: Do not stop the tick before cpuidle_idle_call()")'
'commit 8b468535dfdc ("UPSTREAM: jiffies: Introduce USER_TICK_USEC and redefine TICK_USEC")'
'commit 3a25735bd7ec ("UPSTREAM: cpuidle: Return nohz hint from cpuidle_select()")'
'commit f69cfc8ef98a ("BACKPORT: time: tick-sched: Split tick_nohz_stop_sched_tick()")'
'commit 6277dd586f11 ("BACKPORT: time: hrtimer: Introduce hrtimer_next_event_without()")'
'commit 8c71f69fb440 ("UPSTREAM: sched: idle: Select idle state before stopping the tick")'
'commit 30693a4f0909 ("UPSTREAM: cpuidle: menu: Refine idle state selection for running tick")'
'commit e32966ced86f ("UPSTREAM: cpuidle: menu: Avoid selecting shallow states with stopped tick")'
Also fix the compilation errrors as tick_nohz_get_sleep_length()
function signature is changed.
Change-Id: I21488a5a91f1eac11d4e139fd44968d52563717c
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
The label for the opp-tables are being deleted but not the
phandles for the nodes. Fix this bug for the updated tables
to reflect in SM8150 v2.
Change-Id: I1012e2223d28549a528bc16e69b3e3770a03c17e
Signed-off-by: Rama Aparna Mallavarapu <aparnam@codeaurora.org>
Update PCIe0 and PCIe1 PHY sequence for sm8150 V1 and V2
based on h/w recommendation.
Change-Id: Iac7ab2bfd20349bf24db07824ab9bed9b2e697ab
Signed-off-by: Tony Truong <truong@codeaurora.org>
Currently, the bw_hwmon governor handles DEVFREQ_GOV_STOP and
DEVFREQ_GOV_SUSPEND events by calling devfreq_monitor_stop
and devfreq_monitor_suspend respectively, prior to disabling
the bw_hwmon irq. Doing so allows for the following race condition:
T0: bw_hwmon irq thread:
/* df->governor == bw_hwmon
* changing to
* powersave governor
*/
governor_store()
/* Calls bw_hwmon governor event
* handler with DEVFREQ_GOV_STOP
* event
*/
df->governor->event_handler()
gov_stop()
stop_monitor()
update_bw_hwmon()
devfreq_monitor_stop()
/* Cancels timer for future calls
* to devfreq_monitor
*/
devfreq_monitor_stop()
/* Calls free_irq(), which waits
* for the bw_hwmon IRQ thread
* to finish.
*/
hw->stop_hwmon()
--finishes update_devfreq()--
/* Incorrectly starts
* devfreq_monitoring
*/
devfreq_monitor_start()
--thread finishes execution--
--finishes DEVFREQ_GOV_STOP
handling--
--switches governor to powersave--
/* devfreq monitor for this
* instance. This will call
* queue_delayed_work()
* which internally queues
* the timer for this devfreq
* structure.
*/
devfreq_monitor()
/* df->governor == powersave
* changing to bw_hwmon
*/
governor_store()
/* powersave: DEVFREQ_GOV_STOP
*/
df->governor->event_handler()
/* bw_hwmon: DEVFREQ_GOV_START
*/
df->governor->event_handler()
gov_start()
/* Will incorrectly adjust
* the fields within the
* timer and corrupt the
* timer data structure
*/
devfreq_monitor_start()
Since this corrupts the timer data structures, when the timer
gets expired, it will be expired twice. Fix this race condition
by introducing new lock to synchronize the access to the
mon_started variable, so that the irq thread does not restart
the devfreq monitor after it has been stopped.
Change-Id: I2dced21d5343afd6ec2e13876e26aeb5c83a4d12
Signed-off-by: Rama Aparna Mallavarapu <aparnam@codeaurora.org>
When Vph is low because of low battery voltage and high system
load, i_sink calculated can have a zero because of not fitting
any of the conditional blocks. In real case, WLED flash is
possible even at this lower battery voltage. Hence set i_sink
to max_fsc to begin with and update it to a different voltage
based on the calculations later.
For an unsupported configuration, no calculations are available
to limit i_sink. Hence, limit the current to half of max_fsc
if Vph is below 3.2 V as per the hardware recommendation.
Change-Id: I8dcce6aa1722314006d6b34f6389ce640b8a25c3
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
There could a GOOD_OCV when the device is off. Clear the
GOOD_OCV status register by reading from it during init
and during device suspend.
Change-Id: If88ea132c4151712e8402b64b3b88bd3daf2fd1a
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
smp2p sleep state is extended to handle interrupts from
remote processor to decide whether to acquire wake lock
or not during wakeup sensor sample processing.
For wake up sensors, the driver is expected to a hold a
wake lock with a timeout of 200 ms while reporting this
event as per spec.
Change-Id: Icc342be71b22400b54fe5021c8cecdd0015640e7
Signed-off-by: Shaikh Shadul <sshadu@codeaurora.org>
Decrement number of packet in ODL queue only if the count was not zero,
otherwise it was leading packet count value to negative value.
Change-Id: I21f913396f7062d4e175c923cf4f523a567f06a9
Acked-by: Ashok Vuyyuru <avuyyuru@qti.qualcomm.com>
Signed-off-by: Mohammed Javid <mjavid@codeaurora.org>
Mode in etr drvdata is not reset to CS_MODE_DISABLED in USB case.
In this case, following ETR enablement on mem mode won't work. Set
the mode status correctly. Coresight source should be disabled
in reset case and echo 0 > enable_source case. Decrease the refcnt
to disable the source correctly.
Change-Id: I6f88efcd22ef56dc12f85a821a1dc004b4dda3d8
Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org>
Add platform specific data like fw-cycles,
power collapse delay, HW response time out
for sm6150.
CRs-Fixed: 2295372
Change-Id: I01cca7f0443661685f531a0ae829f9a042569e51
Signed-off-by: Manikanta Kanamarlapudi <kmanikan@codeaurora.org>
Add the CLK_IS_CRITICAL flag for gpu_cc_ahb_clk to keep it
enabled at all times. This is needed to avoid unclocked
register accesses by SMMU since SMMU vote registers do not
enable gpu_cc_ahb_clk.
Also skip an enable check for this clock since it will not
be physically enabled until gpu_cx_gdsc is enabled.
Change-Id: I83c81a20f306752a87ee0bb70ee7b1efbce5e001
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
For pm qos latency on sm6150, sm8150 was followed in commit <07e861d2d>
("ARM: dts: Enable bus voting and PM QoS for sm6150 platform").
This need to be update as per sdm670 where pm qos latency value is
different than sm8150.
Change-Id: I8432d2fdc443cfedaab81d47bd66804993a8667e
Signed-off-by: Ram Prakash Gupta <rampraka@codeaurora.org>
Since display RSCs have their own dedicated AMC TSC,
they no longer need to repurpose a single TSC for both
wake and AMC.
Also add CN1 BCM node and update the DDR bus width.
Change-Id: Ieefa4fa8e0202ce9720eec7827e698b4b98b91d5
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
For "chunk_list + chunk_list_len", if the chunk_list is type of u32*,
the chunk_list_len will be 4 * of original size. So we flushed a wrong
area size. In some condition like we enabled CONFIG_DEBUG_PAGEALLOC, it
may flush out of page bound of the invalid pte page.
Fix it by manually convert it as void* when doing the addition.
CRs-Fixed: 2309993
Change-Id: I2b88d78ba73d9904fa2bf6106937001715b6037f
Signed-off-by: Zhenhua Huang <zhenhuah@codeaurora.org>
'Commit 1b7e5a863b56
("power: qpnp-fg-gen4: Enable parallel charging current measurement")'
modified BATT_INFO_FG_CNV_CHAR_CFG to enable parallel charging
current measurement which is essential for calculating state of
charge (SOC) accurately. However, if SMB_MEASURE_EN_BIT is set
when FG HW is in the middle of ADC conversions, it can cause ADC
to get locked up without an end of conversion (EOC). Hence that
change got reverted.
Re-enable parallel current measurement as follows.
- Configure PEEK_MUX to output ALG active signal on MEM_ATTN interrupt
- Wait for MEM_ATTN interrupt
- Modify SMB_MEASURE_EN_BIT in BATT_INFO_FG_CNV_CHAR_CFG
Also, configure SMB_MEASURE_EN_BIT dynamically so that parallel
current summing gets enabled upon charger insertion and disabled
upon charger removal or charge termination.
Change-Id: I81289127eeda0af66e11da3290d1b596301becda
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
For configuring parallel current measurement, mem-attn interrupt
needs to be enabled as the register write should be done only
on the falling edge of that interrupt and PEEK_MUX is configured
to output ALG active signal on that interrupt. Add the interrupt
configuration to PM8150B FG to allow that.
Change-Id: Ie0ab3c67a80d1798af8cc1076c3a889b4b3beb58
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
