761057 Commits

Author SHA1 Message Date
Vishvesh Deobhankar
b77cd850e0 msm: added support for SOTA notification
Added Support for SOTA notification Check status from HLOS

Change-Id: I1bf58c0ee0dce8a5b1351812c1e9813438d0c0a8
Signed-off-by: Vishvesh Deobhankar <vdeobhan@codeaurora.org>
2020-09-23 04:02:57 -07:00
qctecmdr
11a49af2d6 Merge "ARM: dts: msm: multi-card for SA6155/SA8155/SA8195 lxc dtbo" 2020-09-22 03:50:30 -07:00
qctecmdr
0123cd1ba8 Merge "ARM: dts: msm: Add cnss dts for dual hst in sa8195 LV GVM" 2020-09-22 03:50:30 -07:00
qctecmdr
2d86544c4c Merge "power: qpnp-fg-gen4: Fix uninitialized usage of local variables" 2020-09-22 03:50:30 -07:00
qctecmdr
6a266bfd34 Merge "dm-crypt: Skip encryption if bio is fscrypto or blk-crypto encrypted" 2020-09-22 03:50:29 -07:00
qctecmdr
06d683ccf6 Merge "arm64: dts: msm: Enable SMMU fastmap for msmnile_gvmq" 2020-09-21 22:08:33 -07:00
Veera Vegivada
d94225a0c1 power: qpnp-fg-gen4: Fix uninitialized usage of local variables
Initialize the variables to default values to avoid
accessing uninitialized.

Change-Id: Ia82b0028ab333618bfbccf2c4e0f50d86dc29a4f
Signed-off-by: Veera Vegivada <vvegivad@codeaurora.org>
2020-09-22 09:56:03 +05:30
qctecmdr
0d9f71d686 Merge "ARM: dts: msm: enable widebus on SA6155" 2020-09-21 09:47:45 -07:00
qctecmdr
7c4c48441a Merge "ion: msm: Restrict VMID_CP_CAMERA_ENCODE to read only" 2020-09-21 09:47:45 -07:00
Neeraj Soni
a18de90321 dm-crypt: Skip encryption if bio is fscrypto or blk-crypto encrypted
Skip encryption of bio if it is already fs-crypto encrypted or is
supposed to be encrypted by blk-crypto.

Change-Id: I89053a2e0a63941265f5973f2f78786e69f0db37
Signed-off-by: Neeraj Soni <neersoni@codeaurora.org>
2020-09-21 20:34:24 +05:30
Vishwanath Raju K
8a44d5cb1f ion: msm: Restrict VMID_CP_CAMERA_ENCODE to read only
Restrict VMID_CP_CAMERA_ENCODE to read only when it is shared
with VMID_CP_CAMERA to support secure encode.

Change-Id: Ifb40cc0ae4b2bac30d683567d8e7c767ac482be3
Signed-off-by: Vishwanath Raju K <vishk@codeaurora.org>
2020-09-21 04:33:34 -07:00
qctecmdr
eb8ff98008 Merge "ARM: dts: msm: correct the iova address range for Rome" 2020-09-21 04:17:46 -07:00
qctecmdr
abb6b9b941 Merge "clk: qcom: gdsc-regulator: return defer when mailbox is not ready" 2020-09-21 04:17:46 -07:00
qctecmdr
1a17751b4a Merge "msm: veth_ipa: changes for fastmap" 2020-09-21 04:17:45 -07:00
qctecmdr
0d05707a78 Merge "arm64: dts: msm: Enable SMMU S1 for msmnile_gvmq" 2020-09-21 04:17:45 -07:00
Akshay Pandit
8a2864e854 arm64: dts: msm: Enable SMMU fastmap for msmnile_gvmq
Enable fastmap attrib for SMMU stage 1 translation for ap cb
for msmnile_gvmq.


Change-Id: I04e26d68f04108d44f4b028afa46c1128d9269c1
Signed-off-by: Akshay Pandit <pandit@codeaurora.org>
2020-09-21 13:27:14 +05:30
Akshay Pandit
e81d2cba0f arm64: dts: msm: Enable SMMU S1 for msmnile_gvmq
Enable SMMU stage 1 translation for ap, wlan, uc context banks
for msmnile_gvmq.

Change-Id: If15a306cb03bde02e15f48b3d968d571d6ecf5c7
Signed-off-by: Akshay Pandit <pandit@codeaurora.org>
2020-09-21 00:20:33 -07:00
Akshay Pandit
1b21eb454f msm: veth_ipa: changes for fastmap
Fix for enabling fastmap in IPA

Change-Id: Ib3a30579e948adad93f3170a658b994ca44991e0
Acked-by: Kaushik P E <kpe@qti.qualcomm.com>
Signed-off-by: Akshay Pandit <pandit@codeaurora.org>
2020-09-21 12:26:58 +05:30
qctecmdr
bf8e2cbe97 Merge "cnss2: Update the wlan fw name for Genoa" 2020-09-20 22:48:38 -07:00
Chaoli Zhou
df40bd055f ARM: dts: msm: Add cnss dts for dual hst in sa8195 LV GVM
In order to support dual hastings running on sa8195
LV GVM, enable pcie2 and add cnss node for the second
WLAN chipset.

Change-Id: Ib746309ce44103f006127d369aed342befa405ec
Signed-off-by: Chaoli Zhou <zchaoli@codeaurora.org>
2020-09-21 13:30:17 +08:00
Chaoli Zhou
393b0583d7 ARM: dts: msm: correct the iova address range for Rome
The iova start address of Rome is 0x10000000 and
0x20000000, but it doesn't match with the value
in the "ranges", which are 0xa0000000 and 0xb0000000.
So correct to the right ones.

Change-Id: I1d74f500a5a3944ce250a9bef5e142d8b3ed2c41
Signed-off-by: Chaoli Zhou <zchaoli@codeaurora.org>
2020-09-21 10:31:35 +08:00
Chaoli Zhou
9d4b05d504 cnss2: Update the wlan fw name for Genoa
Since PCIE Genoa has separate wlan fw patch for
mission mode(amss.bin) and ftm mode(genoaftm.bin),
but cnss2 platform driver always try to load amss.bin,
which is not feasible. So add this new interface for
cnss2 to get correct driver mode and update the fw
patch name.

Change-Id: I7c17ca5f96b9d5717fbe65e0b177249cd9424dec
Signed-off-by: Chaoli Zhou <zchaoli@codeaurora.org>
2020-09-20 19:23:27 -07:00
qctecmdr
98bf49c039 Merge "msm: ipa: Use pipe 6 & 18 for hastings on msmnile" 2020-09-20 16:46:21 -07:00
qctecmdr
5953c3fd4c Merge "ARM: dts: msm: Add pinctrl setting for sideband GPIO for SA2145" 2020-09-20 01:59:45 -07:00
qctecmdr
7071374a49 Merge "ARM: dts: msm: Add pinctrl setting for sideband GPIO for SA2150" 2020-09-20 01:59:44 -07:00
qctecmdr
c4dc36d302 Merge "net: qrtr: ethernet: Fix incorrect buffer offset" 2020-09-19 17:44:19 -07:00
Jay Jayanna
40f8042467 net: qrtr: ethernet: Fix incorrect buffer offset
While copying more bytes in a partial packet, the buffer pointer was
incorrectly shifted. So, only the last part of the packet was posted
to the qrtr core, resulting in invalid packet error.

Change-Id: I9823ea5cec1befa55917a0450adacb8e7233d94d
Signed-off-by: Jay Jayanna <jayanna@codeaurora.org>
2020-09-19 10:09:03 -07:00
Akshay Pandit
372dbfa166 msm: ipa: Use pipe 6 & 18 for hastings on msmnile
Make change to use endpoint 6 & 18 for hastings WLAN2_CONS/PROD
on msmnile gvmq target.

Change-Id: I8e5a7711dccc53419e7a17851df7a878e2ef0063
Signed-off-by: Akshay Pandit <pandit@codeaurora.org>
2020-09-19 20:55:52 +05:30
qctecmdr
08e5175b7e Merge "dfc: TCP pure acks" 2020-09-19 05:07:12 -07:00
qctecmdr
8209738692 Merge "msm: kgsl: Do GX GBIF halt only if GX is on" 2020-09-18 23:33:17 -07:00
qctecmdr
92ba2ec075 Merge "ARM: dts: msm: enable widebus on SA8155" 2020-09-18 23:33:17 -07:00
qctecmdr
a3a9cf3b1a Merge "net: stmmac: set valid mac addr in success case" 2020-09-18 23:33:16 -07:00
Subash Abhinov Kasiviswanathan
ee6187ea2e dfc: TCP pure acks
Detects TCP pure acks so they can be put in the dedicated TX queues
even if they contain various options.

Change-Id: I6a9b714ccb58616ff49a150467d33a348d88ec64
Acked-by: Weiyi Chen <weiyic@qti.qualcomm.com>
Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
2020-09-18 15:24:24 -06:00
Sunil Paidimarri
0e42f5ca50 net: stmmac: set valid mac addr in success case
Set valid mac address to true only if mac address
programmed in fuse register valid.

Change-Id: I464b81a8b8728f36f93bed732e9c58495db4a4de
Signed-off-by: Sunil Paidimarri <hisunil@codeaurora.org>
2020-09-18 13:25:39 -07:00
qctecmdr
327aa391ef Merge "video: fbdev: msm: Add support for ultra low power state" 2020-09-18 10:11:44 -07:00
Zhiqiang Liu
362be2a52f ARM: dts: msm: enable widebus on SA8155
Enable widebus feature on SA8155 to fix the issue
that DP panel underrun when enable 10-bits DSC.

Change-Id: I6669a85257362ac34c91cd98351fc9764bc78845
Signed-off-by: Zhiqiang Liu <zhiqliu@codeaurora.org>
2020-09-18 20:44:35 +08:00
Zhiqiang Liu
294f5ef5de ARM: dts: msm: enable widebus on SA6155
Enable DP widebus feature on SA6155.

Change-Id: I4748fbb7e4a42154861e5ad2ab6956e824eb8132
Signed-off-by: Zhiqiang Liu <zhiqliu@codeaurora.org>
2020-09-18 20:41:15 +08:00
qctecmdr
a8eb2ce9b5 Merge "atlantic forwarding driver v1.1.10" 2020-09-18 04:24:52 -07:00
qctecmdr
d20289df29 Merge "Merge android-4.14-stable.190 (d2d05bc) into msm-4.14" 2020-09-18 04:24:51 -07:00
qctecmdr
e16ea5d17c Merge "rpmsg: glink: Enable irq wake for glink interrupt" 2020-09-18 04:24:50 -07:00
qctecmdr
14403b3a85 Merge "coresight: Fix support for sparsely populated ports" 2020-09-18 04:24:50 -07:00
qctecmdr
f0aa6cf97e Merge "ARM: dts: msm: modify wlan pil base address for prairie-iot" 2020-09-18 04:24:50 -07:00
qctecmdr
3fc0ce6f5d Merge "gpu: drm: msm: add event to event_list after register is successful" 2020-09-18 04:24:49 -07:00
qctecmdr
a1cfcac78f Merge "cnss2: Support dual wlan cards managed by cnss2 platform driver" 2020-09-18 04:24:49 -07:00
qctecmdr
e92c1cc192 Merge "soc: qcom: ssr: Enable the irqs before powering up subsystems" 2020-09-18 04:24:48 -07:00
qctecmdr
72d30390bd Merge "net: aquantia: Using non-interrupt mode for ICMP packets" 2020-09-18 04:24:48 -07:00
qctecmdr
96c259b7ef Merge "net : stmmac: Fix the MAC2MAC crash" 2020-09-18 04:24:47 -07:00
qctecmdr
8c360daa41 Merge "ARM: dts: qcom: Move IOMMU entries for HS-I2S device" 2020-09-18 04:24:47 -07:00
qctecmdr
0605b92f29 Merge "cnss2: Collect shadow registers for RDDM scenario" 2020-09-18 04:24:46 -07:00
Lin Bai
fb322cad07 cnss2: Collect shadow registers for RDDM scenario
Current implementation only collect shadow register when host
force triggered RDDM.
Extend it to any RDDM scenario.

Change-Id: I8a14950b9b4cd42df016ecbb2eac6dc7d8ae115c
Signed-off-by: Lin Bai <lbai@codeaurora.org>
2020-09-17 23:39:17 -07:00