Right now if a task ran 15% in the previous window, that task is
considered as part of number of running tasks as well as while
calculating misfit tasks on smaller capacity clusters which
agressively un-isolates higher capacity CPUs and may lead to
more power consumption. To avoid such issues, make number of
running tasks conservative by changing threshold to 85%.
Change-Id: Ic82724b822bb605fbda385ddeb50a591757d2c9d
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
Prev assist is not needed for all clusters with in the system
and can be enabled from user space for specific cluster as needed.
So, disable prev assist by default and update checks as necessary.
Change-Id: I3e3770a0f2dc6f588693c98e3b8514b4fab29fd6
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
Currently, if the task_threshold is very high as compared
to the assist threshold, we could end up in a situation
where the next cluster assists when there are isolated
cores in the prev cluster.
Fix this by setting the assist need to 0 when there are
isolated cpus.
Change-Id: Ic85ce244397a48d2bb28fd68b2c7c49d06c1afa5
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
The base of mem timer was incorrect, resulting
in non firing of mem timer hence updating the same.
Change-Id: Ib62a1599abf554f01af63b2f26aa994e12824ac8
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Signed-off-by: Archit Saxena <archsaxe@codeaurora.org>
Enable SMEM, RPMSG and Glink drivers for communication
with MPSS, LPASS and CDSP.
CRs-Fixed: 2243942
Change-Id: Ib59cef94263c679e4fab69ea252a53806e98ba56
Signed-off-by: Dhoat Harpal <hdhoat@codeaurora.org>
Set long latency requirement for isolated cores to ensure LPM logic will
select a deep sleep state.
Change-Id: I83e9fbb800df259616a145d311b50627dc42a5ff
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
defconfig: Enable CONFIG_NETFILTER_XT_MATCH_BPF
Enable bpf match support for targets with kernel 4.9 and above
so that iptable command from netd (userspace module) with -m bpf
doesn't fail.
defconfig: Enable full reference count validation
Enable full reference count validation to prevent
use-after-free cases and memory leak cases that
may appear because of reference count overflows.
defconfig: sm8150: Enable vmem layout prints
Config option to print kernel virtual memory layout by default
on debug builds.
Change-Id: I5e0cc359851b827821fed07c83eaff239423eee0
Signed-off-by: Hans Chang <hansc@codeaurora.org>
Add mpm interrupt controller as SOC interrupt parent and
as a child domain under intc for qcs405.
Change-Id: I3fc3a24d7a99c64fe1ab615b37239aec0b8e13c1
Signed-off-by: Raghavendra Kakarla <rkakarla@codeaurora.org>
Without NAT device initialization sending NAT DMA
commands leads to XPU violation. Added checks to
verify device initialized or not before sending DMA
command.
Change-Id: I7440abc14a81e1621573f0e2808a410d60b2458d
Acked-by: Ashok Vuyyuru <avuyyuru@qti.qualcomm.com>
Signed-off-by: Mohammed Javid <mjavid@codeaurora.org>
Core control assumes that the clusters in the system are sorted
based on their capacity, i.e., first cluster is the minimum
capacity cluster and last cluster is the max capacity cluster,
but, there are systems which has max capacity cluster as first
cluster of the system and min capacity cluster as last cluster
in the system. This assumption breaks core control for systems
with max capacity system as first cluster. To make sure core
control won't be broken for such systems, pass sorted clusters
based on the capacity to cluster_init.
Change-Id: Ib27698080b9e4fe8b0e7789b9042d0a210fda486
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
Add support for second USB controller and PHYs on sm8150. Add
nodes for GPIO based extcon on CDP and MTP which is used to
notify cable connection status via VBUS and ID pins. Also use
secondary phandles for regulators which match the naming scheme
used in the power grid hardware documentation.
Leave the nodes disabled for now.
Change-Id: I0da14087011d5845a13fd956b6c5457265ec4fb4
Signed-off-by: Jack Pham <jackp@codeaurora.org>
MHI device does not require host to assert wake
when processing downlink data.
CRs-Fixed: 2248650
Change-Id: Ibc8aa75afdeb9176ea936d794b39c6675ad49859
Signed-off-by: Sujeev Dias <sdias@codeaurora.org>
Acquiring of pm lock is necessary if data is going over the PCIe
link to avoid another thread from turning off the link. For
reading pm state, acquiring pm lock is not necessary so remove
grabbing the lock when entering process ctrl event thread.
CRs-Fixed: 2248650
Change-Id: I68b894f41cac5a4a4c58bc94a20eaef4d70bf311
Signed-off-by: Sujeev Dias <sdias@codeaurora.org>
When processing completion events, we do not need to assert
wake because device has already completed required work.
CRs-Fixed: 2248650
Change-Id: I0a1981baaae2784a23abf1fdc262bc9e7f2aa460
Signed-off-by: Sujeev Dias <sdias@codeaurora.org>
When MHI is in an active state, external device CPU cores can go
into a low power mode while device data movers processing data
transfer. Whenever host assert wake, it can cause device CPU to
exit low power mode even though there is no work to be done. For
downlink channels, assert wake only if MHI is in a low power mode
to avoid unnecessary wake ups.
CRs-Fixed: 2248650
Change-Id: I05ca7483a885237711a630844670e887572c13b7
Signed-off-by: Sujeev Dias <sdias@codeaurora.org>
Some MHI clients require terminal signals coming from modem
to host. Add support for processing device terminal
signals.
CRs-Fixed: 2225734
Change-Id: I795d610deb7673dde0d6bc95ae4f361b66d4cdf5
Signed-off-by: Sujeev Dias <sdias@codeaurora.org>
As an optimization, have dedicated event processing
algorithm based on type of event ring.
CRs-Fixed: 2246114
Change-Id: I5bdb155a8b24ddc5ba62ac31630f0fbb30632c5d
Signed-off-by: Sujeev Dias <sdias@codeaurora.org>
For better clarity, reorganize how MHI event rings
are configured in device node.
CRs-Fixed: 2244344
Change-Id: I27c734668d63bbd98b285360916a3a36c6fb97b4
Signed-off-by: Sujeev Dias <sdias@codeaurora.org>
DMA allocations with no kernel mapping are likely
protected as well. Stale highmem mappings in such cases
with cache-able attributes may lead to speculative fetch,
as highmem mappings are not cleared out.
Hence flush out unused highmem mappings explicitly when
allocation request with no kernel mapping is requested.
Change-Id: Ic1de633c6364eaa1b6d5b0932f2cfe17d64d920e
Signed-off-by: Shiraz Hashim <shashim@codeaurora.org>
Signed-off-by: Charan Teja Reddy <charante@codeaurora.org>
The highmem code provides kmap_flush_unused to ensure all kmap
mappings are really removed if they are unused. This code does not
handle kmap_atomic mappings since they are managed separately.
This prevents an issue for any code which relies on having absolutely
no mappings for a particular page. Rather than pay the penalty of
having CONFIG_DEBUG_HIGHMEM on all the time, add functionality
to remove the kmap_atomic mappings in a similar way to kmap_flush_unused.
Change-Id: I9d73abad693c18f2daa1647353e7592b255475b0
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Charan Teja Reddy <charante@codeaurora.org>
The DMA_ATTR_NO_KERNEL_MAPPING is used to make sure that CMA
pages have no kernel mapping. Add support to make sure that
highmem pages have no mapping.
Change-Id: Ife76df126ecfedf0dba81a35e0de8a1787355b3d
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: Vijayanand Jitta <vjitta@codeaurora.org>
Signed-off-by: Charan Teja Reddy <charante@codeaurora.org>
